Dataflow Formalisation of Real-Time Streaming Applications on a Composable and Predictable Multi-Processor SOC

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F15%3A00229603" target="_blank" >RIV/68407700:21230/15:00229603 - isvavai.cz</a>

Výsledek na webu

<a href="http://dx.doi.org/10.1016/j.sysarc.2015.04.001" target="_blank" >http://dx.doi.org/10.1016/j.sysarc.2015.04.001</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.1016/j.sysarc.2015.04.001" target="_blank" >10.1016/j.sysarc.2015.04.001</a>

Jazyk výsledku

angličtina

Název v původním jazyce

Dataflow Formalisation of Real-Time Streaming Applications on a Composable and Predictable Multi-Processor SOC

Popis výsledku v původním jazyce

Embedded systems often contain multiple applications, some of which have real-time requirements and whose performance must be guaranteed. To efficiently execute the applications modern embedded systems contain Globally Asynchronous Locally Synchronous (GALS) processors, network on chip, DRAM and SRAM memories, and system software, e.g. microkernel and communication libraries. In this paper we describe a complete formalisation of multiple real-time applications executing on the CompSOC platform, including new models of the entire software stack. We compare the guaranteed application throughput as computed by our tool flow to the throughput measured on an FPGA implementation of the platform, for both synthetic and real H.263 applications.The dataflow formalisation is composable (i.e. independent for each real-time application), conservative, models the impact of GALS on performance, and correctly predicts trends, such as application speed-up when mapping an application to more processors

Název v anglickém jazyce

Dataflow Formalisation of Real-Time Streaming Applications on a Composable and Predictable Multi-Processor SOC

Popis výsledku anglicky

Embedded systems often contain multiple applications, some of which have real-time requirements and whose performance must be guaranteed. To efficiently execute the applications modern embedded systems contain Globally Asynchronous Locally Synchronous (GALS) processors, network on chip, DRAM and SRAM memories, and system software, e.g. microkernel and communication libraries. In this paper we describe a complete formalisation of multiple real-time applications executing on the CompSOC platform, including new models of the entire software stack. We compare the guaranteed application throughput as computed by our tool flow to the throughput measured on an FPGA implementation of the platform, for both synthetic and real H.263 applications.The dataflow formalisation is composable (i.e. independent for each real-time application), conservative, models the impact of GALS on performance, and correctly predicts trends, such as application speed-up when mapping an application to more processors

Druh

J_x - Nezařazeno - Článek v odborném periodiku (Jimp, Jsc a Jost)

CEP obor

JC - Počítačový hardware a software

OECD FORD obor

—

Projekt

<a href="/cs/project/EE2.3.30.0034" target="_blank" >EE2.3.30.0034: Podpora zkvalitnění týmů výzkumu a vývoje a rozvoj intersektorální mobility na ČVUT v Praze</a><br>

Návaznosti

P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Rok uplatnění

2015

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název periodika

Journal of Systems Architecture

ISSN

1383-7621

e-ISSN

—

Svazek periodika

61

Číslo periodika v rámci svazku

9

Stát vydavatele periodika

NL - Nizozemsko

Počet stran výsledku

14

Strana od-do

435-448

Kód UT WoS článku

000364271900005

EID výsledku v databázi Scopus

2-s2.0-84944276528