Space and execution efficient formats for modern processor architectures

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21240%2F15%3A00237946" target="_blank" >RIV/68407700:21240/15:00237946 - isvavai.cz</a>

Výsledek na webu

<a href="http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=7426068" target="_blank" >http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=7426068</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.1109/SYNASC.2015.24" target="_blank" >10.1109/SYNASC.2015.24</a>

Jazyk výsledku

angličtina

Název v původním jazyce

Space and execution efficient formats for modern processor architectures

Popis výsledku v původním jazyce

Sparse matrix-vector multiplication (shortly SpMV) and transposed SpMV (shortly SpMTV) are the most common routines in the numerical algebra. Sparse storage formats describe a way how sparse matrices are stored in a computer memory. Since the commonly used storage formats (like COO or CSR) are not sufficient for high-performance computations, extensive research has been conducted about maximal computational efficiency of these routines. For modern CPU architectures, the main bottleneck of these routinesis the limited memory bandwidth. In this paper, we introduce a new approach for these routines for modern processor architectures using a space efficient hierarchical format, which can significantly reduce the amount of transferred data from memory foralmost all types of matrices arising from various application disciplines. This format represents a trade-off between space and execution efficiency. The performance of these routines with this format seems to be very close to the hardwar

Název v anglickém jazyce

Space and execution efficient formats for modern processor architectures

Popis výsledku anglicky

Sparse matrix-vector multiplication (shortly SpMV) and transposed SpMV (shortly SpMTV) are the most common routines in the numerical algebra. Sparse storage formats describe a way how sparse matrices are stored in a computer memory. Since the commonly used storage formats (like COO or CSR) are not sufficient for high-performance computations, extensive research has been conducted about maximal computational efficiency of these routines. For modern CPU architectures, the main bottleneck of these routinesis the limited memory bandwidth. In this paper, we introduce a new approach for these routines for modern processor architectures using a space efficient hierarchical format, which can significantly reduce the amount of transferred data from memory foralmost all types of matrices arising from various application disciplines. This format represents a trade-off between space and execution efficiency. The performance of these routines with this format seems to be very close to the hardwar

Druh

D - Stať ve sborníku

CEP obor

IN - Informatika

OECD FORD obor

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Projekt

—

Návaznosti

S - Specificky vyzkum na vysokych skolach<br>I - Institucionalni podpora na dlouhodoby koncepcni rozvoj vyzkumne organizace

Rok uplatnění

2015

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název statě ve sborníku

17th International Symposium on Symbolic and Numeric Algorithms for Scientific Computing

ISBN

978-1-5090-0461-4

ISSN

—

e-ISSN

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Počet stran výsledku

8

Strana od-do

98-105

Název nakladatele

IEEE Computer Society

Místo vydání

Los Alamitos

Místo konání akce

Timisoara

Datum konání akce

21. 9. 2015

Typ akce podle státní příslušnosti

WRD - Celosvětová akce

Kód UT WoS článku

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