Temperature Dependence of ROPUF on FPGA

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21240%2F16%3A00304712" target="_blank" >RIV/68407700:21240/16:00304712 - isvavai.cz</a>

Výsledek na webu

<a href="http://dx.doi.org/10.1109/DSD.2016.29" target="_blank" >http://dx.doi.org/10.1109/DSD.2016.29</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.1109/DSD.2016.29" target="_blank" >10.1109/DSD.2016.29</a>

Jazyk výsledku

angličtina

Název v původním jazyce

Temperature Dependence of ROPUF on FPGA

Popis výsledku v původním jazyce

This paper continues and extends our previous work introduced in [3], [4], in which we proposed a ring oscillator (RO) based Physical Unclonable Function (PUF) on FPGA. Our approach is able to extract multiple output bits from each RO pair in contrary to the classical approach, where frequencies of ROs are compared. Our original design used asymmetric ROs, i.e. without constrained placement of gates. In this paper, we investigate the behaviour of the proposed ROPUF using symmetric ROs, and compare them against the original approach with asymmetric ROs. The measurement results showed that the ROPUF with symmetric ROs is approximately two times more stable with varying temperature. We have also compared three different methods of information extraction from ROPUF based on frequency measurement. The measured results show that out of these three methods, our one is the most stable against change of temperature. The measurements were performed on Digilent Basys 2 FPGA boards (Xilinx Spartan3E-100 CP132).

Název v anglickém jazyce

Temperature Dependence of ROPUF on FPGA

Popis výsledku anglicky

This paper continues and extends our previous work introduced in [3], [4], in which we proposed a ring oscillator (RO) based Physical Unclonable Function (PUF) on FPGA. Our approach is able to extract multiple output bits from each RO pair in contrary to the classical approach, where frequencies of ROs are compared. Our original design used asymmetric ROs, i.e. without constrained placement of gates. In this paper, we investigate the behaviour of the proposed ROPUF using symmetric ROs, and compare them against the original approach with asymmetric ROs. The measurement results showed that the ROPUF with symmetric ROs is approximately two times more stable with varying temperature. We have also compared three different methods of information extraction from ROPUF based on frequency measurement. The measured results show that out of these three methods, our one is the most stable against change of temperature. The measurements were performed on Digilent Basys 2 FPGA boards (Xilinx Spartan3E-100 CP132).

Druh

D - Stať ve sborníku

CEP obor

IN - Informatika

OECD FORD obor

—

Projekt

<a href="/cs/project/GA16-05179S" target="_blank" >GA16-05179S: Výzkum vztahů a společných vlastností spolehlivých a bezpečných architektur založených na programovatelných obvodech</a><br>

Návaznosti

P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Rok uplatnění

2016

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název statě ve sborníku

Proceedings of 19th Euromicro Conference on Digital System Design DSD 2016

ISBN

978-1-5090-2816-0

ISSN

—

e-ISSN

—

Počet stran výsledku

5

Strana od-do

698-702

Název nakladatele

IEEE Computer Soc.

Místo vydání

Los Alamitos, CA

Místo konání akce

Limassol, Cyprus

Datum konání akce

31. 8. 2016

Typ akce podle státní příslušnosti

WRD - Celosvětová akce

Kód UT WoS článku

000386638800097