Three counter value based ROPUFs on FPGA and their properties

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21240%2F22%3A00353850" target="_blank" >RIV/68407700:21240/22:00353850 - isvavai.cz</a>

Výsledek na webu

<a href="https://doi.org/10.1016/j.micpro.2021.104375" target="_blank" >https://doi.org/10.1016/j.micpro.2021.104375</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.1016/j.micpro.2021.104375" target="_blank" >10.1016/j.micpro.2021.104375</a>

Jazyk výsledku

angličtina

Název v původním jazyce

Three counter value based ROPUFs on FPGA and their properties

Popis výsledku v původním jazyce

This paper investigates the behavior of the Physical Unclonable Function (PUF) design proposed in our previous work that is based ring oscillators (ROs). Our approach is able to extract multiple output bits from each RO pair in contrary to the classical approach, where frequencies of ROs are compared. We study the behavior of our PUF design together with other two similar proposals that are also based on extracting PUF bits from counter values. In this work we compare the behavior of three PUF designs that are based on extracting PUF bits from counter values with one of them being proposed in our previous work. We evaluate these proposals at both stable and varying temperature and voltage in order to determine their robustness. The results show that our proposed technique, the frequency ratio, is the most reliable one. Furthermore, we compare the behavior of all of the three designs when mutually asymmetric and symmetric ROs are used. All of the measurements were performed on Cmod S7 FPGA boards (Xilinx XC7S25-1CSGA225C).

Název v anglickém jazyce

Three counter value based ROPUFs on FPGA and their properties

Popis výsledku anglicky

This paper investigates the behavior of the Physical Unclonable Function (PUF) design proposed in our previous work that is based ring oscillators (ROs). Our approach is able to extract multiple output bits from each RO pair in contrary to the classical approach, where frequencies of ROs are compared. We study the behavior of our PUF design together with other two similar proposals that are also based on extracting PUF bits from counter values. In this work we compare the behavior of three PUF designs that are based on extracting PUF bits from counter values with one of them being proposed in our previous work. We evaluate these proposals at both stable and varying temperature and voltage in order to determine their robustness. The results show that our proposed technique, the frequency ratio, is the most reliable one. Furthermore, we compare the behavior of all of the three designs when mutually asymmetric and symmetric ROs are used. All of the measurements were performed on Cmod S7 FPGA boards (Xilinx XC7S25-1CSGA225C).

Druh

J_imp - Článek v periodiku v databázi Web of Science

CEP obor

—

OECD FORD obor

20206 - Computer hardware and architecture

Projekt

<a href="/cs/project/EF16_019%2F0000765" target="_blank" >EF16_019/0000765: Výzkumné centrum informatiky</a><br>

Návaznosti

P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)<br>S - Specificky vyzkum na vysokych skolach

Rok uplatnění

2022

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název periodika

Microprocessors and Microsystems

ISSN

0141-9331

e-ISSN

1872-9436

Svazek periodika

88

Číslo periodika v rámci svazku

February

Stát vydavatele periodika

NL - Nizozemsko

Počet stran výsledku

10

Strana od-do

1-10

Kód UT WoS článku

000819846200004

EID výsledku v databázi Scopus

2-s2.0-85120704792