Digitally programmable low-voltage highly linear transconductor based on promising CMOS structure of differential difference current conveyor

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21460%2F15%3A00242088" target="_blank" >RIV/68407700:21460/15:00242088 - isvavai.cz</a>

Nalezeny alternativní kódy

RIV/00216305:26220/15:PU113531

Výsledek na webu

<a href="http://dx.doi.org/10.1016/j.aeue.2015.03.005" target="_blank" >http://dx.doi.org/10.1016/j.aeue.2015.03.005</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.1016/j.aeue.2015.03.005" target="_blank" >10.1016/j.aeue.2015.03.005</a>

Jazyk výsledku

angličtina

Název v původním jazyce

Digitally programmable low-voltage highly linear transconductor based on promising CMOS structure of differential difference current conveyor

Popis výsledku v původním jazyce

A digitally programmable low-voltage highly linear transconductor (Gm stage) realization, using a promising CMOS structure of differential difference current conveyor (DDCC) and a R-2R ladder network, is introduced in this paper. Thanks to the efficiencyof the DDCC CMOS structure, the transconductor exhibits excellent linearity in a wide range of the input voltage and its transconductance value is digitally programmable by the use of a R-2R ladder network. The CMOS structure of the DDCC is based on thelatest bulk-driven quasi-floating-gate technique and hence it is capable to work under low-voltage power supply of +/- 0.5 V and consumes 36 mu W of power. The differential input MOS transistor pairs of the proposed structure are simultaneously driven from bulk and quasi-floating-gate terminals; this leads to an increased value of the voltage gain, bandwidth, and input common-mode voltage range. The last one is the main benefit of this structure in comparison to already existing solutio

Název v anglickém jazyce

Digitally programmable low-voltage highly linear transconductor based on promising CMOS structure of differential difference current conveyor

Popis výsledku anglicky

A digitally programmable low-voltage highly linear transconductor (Gm stage) realization, using a promising CMOS structure of differential difference current conveyor (DDCC) and a R-2R ladder network, is introduced in this paper. Thanks to the efficiencyof the DDCC CMOS structure, the transconductor exhibits excellent linearity in a wide range of the input voltage and its transconductance value is digitally programmable by the use of a R-2R ladder network. The CMOS structure of the DDCC is based on thelatest bulk-driven quasi-floating-gate technique and hence it is capable to work under low-voltage power supply of +/- 0.5 V and consumes 36 mu W of power. The differential input MOS transistor pairs of the proposed structure are simultaneously driven from bulk and quasi-floating-gate terminals; this leads to an increased value of the voltage gain, bandwidth, and input common-mode voltage range. The last one is the main benefit of this structure in comparison to already existing solutio

Druh

J_x - Nezařazeno - Článek v odborném periodiku (Jimp, Jsc a Jost)

CEP obor

JA - Elektronika a optoelektronika, elektrotechnika

OECD FORD obor

—

Projekt

Výsledek vznikl pri realizaci vícero projektů. Více informací v záložce Projekty.

Návaznosti

I - Institucionalni podpora na dlouhodoby koncepcni rozvoj vyzkumne organizace

Rok uplatnění

2015

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název periodika

AEU-International Journal of Electronics and Communications

ISSN

1434-8411

e-ISSN

—

Svazek periodika

69

Číslo periodika v rámci svazku

7

Stát vydavatele periodika

DE - Spolková republika Německo

Počet stran výsledku

8

Strana od-do

1010-1017

Kód UT WoS článku

000356747800006

EID výsledku v databázi Scopus

2-s2.0-84929520258