Filtry
Possibilities of RAM memory realization in FPGA devices
The possibilities of RAM memory realization in up-to-date FPGA devices are described. Use of block memory and distributed memory is given in more details. As example, VHDL description of FIFO memory is giv...
JA - Elektronika a optoelektronika, elektrotechnika
- 2003 •
- Jx
Rok uplatnění
Jx - Nezařazeno - Článek v odborném periodiku (Jimp, Jsc a Jost)
Stronger Lower Bounds for Online ORAM
Oblivious RAM (ORAM), introduced in the context of software protection by Goldreich and Ostrovsky [JACM'96], aims at obfuscating the memory access pattern induced by a RAM computation. Ideally, the memory acce...
Computer sciences, information science, bioinformathics (hardware development to be 2.2, social aspect to be 5.8)
- 2019 •
- D •
- Odkaz
Rok uplatnění
D - Stať ve sborníku
Výsledek na webu
Side-channel attacks on the Last-level cache on the ARM and x86 architectures
Cache memory has been designed to speed up CPU access time to the main RAM memory. Cache stores frequently accessed data to speed up the execution time of processes. Last-level cache is a shared type of memory acce...
Electrical and electronic engineering
- 2018 •
- Jost
Rok uplatnění
Jost - Ostatní články v recenzovaných periodicích
Microcode-controlled RAM BIST
This paper deals with memory testing principles, focusing mainly on March algorithms. It describes their usage on word based memories. In second part it proposes small programmable BIST controller that can be used in digital circuit...
Electrical and electronic engineering
- 2017 •
- D •
- Odkaz
Rok uplatnění
D - Stať ve sborníku
Výsledek na webu
Software for chalcogenide thin layer resistive memory switching.
Software for chalcogenide thin layer resistive memory switching. Software is using NI card for VA characteristics and switching sequences tests....
Materials engineering
- 2018 •
- R
Rok uplatnění
R - Software
The FPGA Implementation of Dictionary; HW Consumption Versus Latency
using the registers and the RAM memory are described. For these implementations consumption, RAM dictionary implementation is the most effective. On the contrary of both implementation approaches was implemented. The core ...
JA - Elektronika a optoelektronika, elektrotechnika
- 2013 •
- D
Rok uplatnění
D - Stať ve sborníku
Lattice-based Multisignature Optimization for RAM Constrained Devices
signature scheme. These optimizations aim to reduce memory consumption while maintaining with only 192 KB of RAM. Experimental results and security analysis demonstrate......
Computer sciences, information science, bioinformathics (hardware development to be 2.2, social aspect to be 5.8)
- 2024 •
- D •
- Odkaz
Rok uplatnění
D - Stať ve sborníku
Výsledek na webu
Testing Performance of Random Access Memory Using Linear Models
The article compares the speed of half a gigabyte random access memory with the speed of at least one gigabyte random access memory. It uses the theory of linear models to do so, together with data gathered from a particular test co...
BB - Aplikovaná statistika, operační výzkum
- 2008 •
- Jx
Rok uplatnění
Jx - Nezařazeno - Článek v odborném periodiku (Jimp, Jsc a Jost)
Efficient and safe FLASH-based persistent data storage for embedded systems
equipped with built-in FLASH RAM which can be used as a persistent storage container for various run-time or configuration data. However, the nature of FLASH RAM avoids users from simple and efficient multiple writes to identical <...
JC - Počítačový hardware a software
- 2015 •
- D
Rok uplatnění
D - Stať ve sborníku
Cluster-Based I/O-Efficient LTL Model Checking
I/O-efficient algorithms take the advantage of large capacities of external memories to verify huge state spaces even on a single machine with low-capacity RAM and their usagemay significantly increase the amount of available RA...
IN - Informatika
- 2009 •
- D
Rok uplatnění
D - Stať ve sborníku
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