Towards Practical Deployment of Post-quantum Cryptography on Constrained Platforms and Hardware-Accelerated Platforms

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F20%3APU134016" target="_blank" >RIV/00216305:26220/20:PU134016 - isvavai.cz</a>

Výsledek na webu

<a href="https://doi.org/10.1007/978-3-030-41025-4_8" target="_blank" >https://doi.org/10.1007/978-3-030-41025-4_8</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.1007/978-3-030-41025-4_8" target="_blank" >10.1007/978-3-030-41025-4_8</a>

Jazyk výsledku

angličtina

Název v původním jazyce

Towards Practical Deployment of Post-quantum Cryptography on Constrained Platforms and Hardware-Accelerated Platforms

Popis výsledku v původním jazyce

Most of the cryptographic constructions deployed in practical systems today, in particular digital signatures and key-establishment schemes, are vulnerable to attacks using quantum computers. Post-quantum cryptography (PQC) deals with the design and implementation of cryptographic algorithms that are resistant to these attacks. In this paper, we evaluate the NIST's PQC competition candidates with respect to their suitability for the implementation on special hardware platforms. In particular, we focus on the implementability on constrained platforms (e.g., smart cards, small single-board computers) on one side and on the performance on very fast hardware-accelerated platforms (i.e., field-programmable gate arrays - FPGAs) on the other side. Besides the analysis of the candidates' design features affecting the performance on these devices and security aspects, we present also the practical results from the existing implementation on contemporary hardware.

Název v anglickém jazyce

Towards Practical Deployment of Post-quantum Cryptography on Constrained Platforms and Hardware-Accelerated Platforms

Popis výsledku anglicky

Most of the cryptographic constructions deployed in practical systems today, in particular digital signatures and key-establishment schemes, are vulnerable to attacks using quantum computers. Post-quantum cryptography (PQC) deals with the design and implementation of cryptographic algorithms that are resistant to these attacks. In this paper, we evaluate the NIST's PQC competition candidates with respect to their suitability for the implementation on special hardware platforms. In particular, we focus on the implementability on constrained platforms (e.g., smart cards, small single-board computers) on one side and on the performance on very fast hardware-accelerated platforms (i.e., field-programmable gate arrays - FPGAs) on the other side. Besides the analysis of the candidates' design features affecting the performance on these devices and security aspects, we present also the practical results from the existing implementation on contemporary hardware.

Druh

D - Stať ve sborníku

CEP obor

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OECD FORD obor

10201 - Computer sciences, information science, bioinformathics (hardware development to be 2.2, social aspect to be 5.8)

Projekt

Výsledek vznikl pri realizaci vícero projektů. Více informací v záložce Projekty.

Návaznosti

P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Rok uplatnění

2020

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název statě ve sborníku

Innovative Security Solutions for Information Technology and Communications

ISBN

978-3-030-41025-4

ISSN

0302-9743

e-ISSN

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Počet stran výsledku

16

Strana od-do

109-124

Název nakladatele

Springer, Cham

Místo vydání

Neuveden

Místo konání akce

Bucharest

Datum konání akce

14. 11. 2019

Typ akce podle státní příslušnosti

WRD - Celosvětová akce

Kód UT WoS článku

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