On the Efficiency and Security of Quantum-resistant Key Establishment Mechanisms on FPGA Platforms

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F22%3APU145073" target="_blank" >RIV/00216305:26220/22:PU145073 - isvavai.cz</a>

Výsledek na webu

<a href="http://dx.doi.org/10.5220/0011294200003283" target="_blank" >http://dx.doi.org/10.5220/0011294200003283</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.5220/0011294200003283" target="_blank" >10.5220/0011294200003283</a>

Jazyk výsledku

angličtina

Název v původním jazyce

On the Efficiency and Security of Quantum-resistant Key Establishment Mechanisms on FPGA Platforms

Popis výsledku v původním jazyce

The importance of designing efficient and secure post-quantum cryptographic algorithms is reinforced in the recent National Institute of Standards and Technology (NIST)’s Post-Quantum Cryptography (PQC) competitions. Seeking to complement existing studies that evaluate the performance of various PQC algorithms, we explore current hardware implementations of third-round finalist key-establishment algorithms (i.e., Kyber, McEliece, NTRU, and SABER) and the five alternate algorithms (i.e., BIKE, FrodoKEM, HQC, NTRU Prime, and SIKE) on Field Programmable Gate Array (FPGA) platforms. Further, we present our pure-VHDL implementation of Kyber and compare it with the hardware implementations of the NIST finalists. Our design offers one universal Kyber component that can operate in 6 different modes. The evaluation findings show that our pure-VHDL Kyber provides less latency than current VHDL-based implementations.

Název v anglickém jazyce

On the Efficiency and Security of Quantum-resistant Key Establishment Mechanisms on FPGA Platforms

Popis výsledku anglicky

The importance of designing efficient and secure post-quantum cryptographic algorithms is reinforced in the recent National Institute of Standards and Technology (NIST)’s Post-Quantum Cryptography (PQC) competitions. Seeking to complement existing studies that evaluate the performance of various PQC algorithms, we explore current hardware implementations of third-round finalist key-establishment algorithms (i.e., Kyber, McEliece, NTRU, and SABER) and the five alternate algorithms (i.e., BIKE, FrodoKEM, HQC, NTRU Prime, and SIKE) on Field Programmable Gate Array (FPGA) platforms. Further, we present our pure-VHDL implementation of Kyber and compare it with the hardware implementations of the NIST finalists. Our design offers one universal Kyber component that can operate in 6 different modes. The evaluation findings show that our pure-VHDL Kyber provides less latency than current VHDL-based implementations.

Druh

D - Stať ve sborníku

CEP obor

—

OECD FORD obor

10201 - Computer sciences, information science, bioinformathics (hardware development to be 2.2, social aspect to be 5.8)

Projekt

<a href="/cs/project/VJ01010008" target="_blank" >VJ01010008: Kybernetická bezpečnost sítí v postkvantové éře</a><br>

Návaznosti

S - Specificky vyzkum na vysokych skolach

Rok uplatnění

2022

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název statě ve sborníku

19th International Conference on Security and Cryptography (SECRYPT 2022)

ISBN

978-989-758-590-6

ISSN

—

e-ISSN

—

Počet stran výsledku

9

Strana od-do

605-613

Název nakladatele

Neuveden

Místo vydání

neuveden

Místo konání akce

Lisabon

Datum konání akce

11. 7. 2022

Typ akce podle státní příslušnosti

WRD - Celosvětová akce

Kód UT WoS článku

000853004900066