Compact Library of Efficient Polymorphic Gates based on Ambipolar Transistors
Identifikátory výsledku
Kód výsledku v IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F17%3APU123248" target="_blank" >RIV/00216305:26230/17:PU123248 - isvavai.cz</a>
Výsledek na webu
<a href="http://dx.doi.org/10.1109/DTIS.2017.7930180" target="_blank" >http://dx.doi.org/10.1109/DTIS.2017.7930180</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1109/DTIS.2017.7930180" target="_blank" >10.1109/DTIS.2017.7930180</a>
Alternativní jazyky
Jazyk výsledku
angličtina
Název v původním jazyce
Compact Library of Efficient Polymorphic Gates based on Ambipolar Transistors
Popis výsledku v původním jazyce
Main goal of this paper is to propose a compact library of polymorphic gates based on suitable type of reconfigurable transistors. In fact, their exploitation brings a significant advantage for space-efficient synthesis of complex polymorphic circuits. Actual behaviour of those transistors closely depends on so called ambipolar property. That particular aspect simply allows the selection of n- or p- channel operating mode of the transistor structures which is controlled by means of switching the voltage level at a dedicated control electrode. The gates were developed by an evolution approach using Cartesian genetic programming. Various discrete switch-level ambipolar transistor models extended by taking into account the threshold voltage drop degradation effect were used. A diverse range of polymorphic gates were designed, which clearly shows significant transistor savings compared to the conventional approaches. Finally, the individual components that belong to the library also suggest the opportunity how to considerably reduce the target size of complex polymorphic circuits.
Název v anglickém jazyce
Compact Library of Efficient Polymorphic Gates based on Ambipolar Transistors
Popis výsledku anglicky
Main goal of this paper is to propose a compact library of polymorphic gates based on suitable type of reconfigurable transistors. In fact, their exploitation brings a significant advantage for space-efficient synthesis of complex polymorphic circuits. Actual behaviour of those transistors closely depends on so called ambipolar property. That particular aspect simply allows the selection of n- or p- channel operating mode of the transistor structures which is controlled by means of switching the voltage level at a dedicated control electrode. The gates were developed by an evolution approach using Cartesian genetic programming. Various discrete switch-level ambipolar transistor models extended by taking into account the threshold voltage drop degradation effect were used. A diverse range of polymorphic gates were designed, which clearly shows significant transistor savings compared to the conventional approaches. Finally, the individual components that belong to the library also suggest the opportunity how to considerably reduce the target size of complex polymorphic circuits.
Klasifikace
Druh
D - Stať ve sborníku
CEP obor
—
OECD FORD obor
20206 - Computer hardware and architecture
Návaznosti výsledku
Projekt
Výsledek vznikl pri realizaci vícero projektů. Více informací v záložce Projekty.
Návaznosti
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)
Ostatní
Rok uplatnění
2017
Kód důvěrnosti údajů
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Údaje specifické pro druh výsledku
Název statě ve sborníku
2017 12th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS)
ISBN
978-1-5090-6376-5
ISSN
—
e-ISSN
—
Počet stran výsledku
6
Strana od-do
155-160
Název nakladatele
IEEE Circuits and Systems Society
Místo vydání
Palma de Mallorca
Místo konání akce
Palma de Mallorca
Datum konání akce
4. 4. 2017
Typ akce podle státní příslušnosti
WRD - Celosvětová akce
Kód UT WoS článku
000403402000031