Using Libraries of Approximate Circuits in Design of Hardware Accelerators of Deep Neural Networks

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F20%3APU138606" target="_blank" >RIV/00216305:26230/20:PU138606 - isvavai.cz</a>

Výsledek na webu

<a href="https://arxiv.org/abs/2004.10483" target="_blank" >https://arxiv.org/abs/2004.10483</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.1109/AICAS48895.2020.9073837" target="_blank" >10.1109/AICAS48895.2020.9073837</a>

Jazyk výsledku

angličtina

Název v původním jazyce

Using Libraries of Approximate Circuits in Design of Hardware Accelerators of Deep Neural Networks

Popis výsledku v původním jazyce

Approximate circuits have been developed to provide good tradeoffs between power consumption and quality of service in error resilient applications such as hardware accelerators of deep neural networks (DNN). In order to accelerate the approximate circuit design process and to support a fair benchmarking of circuit approximation methods, libraries of approximate circuits have been introduced. For example, EvoApprox8b contains hundreds of 8-bit approximate adders and multipliers. By means of genetic programming we generated an extended version of the library in which thousands of 8- to 128-bit approximate arithmetic circuits are included. These circuits form Pareto fronts with respect to several error metrics, power consumption and other circuit parameters. In our case study we show how a large set of approximate multipliers can be used to perform a resilience analysis of a hardware accelerator of ResNet DNN and to select the most suitable approximate multiplier for a given application. Results are reported for various instances of the ResNet DNN trained on CIFAR-10 benchmark problem. 

Název v anglickém jazyce

Using Libraries of Approximate Circuits in Design of Hardware Accelerators of Deep Neural Networks

Popis výsledku anglicky

Approximate circuits have been developed to provide good tradeoffs between power consumption and quality of service in error resilient applications such as hardware accelerators of deep neural networks (DNN). In order to accelerate the approximate circuit design process and to support a fair benchmarking of circuit approximation methods, libraries of approximate circuits have been introduced. For example, EvoApprox8b contains hundreds of 8-bit approximate adders and multipliers. By means of genetic programming we generated an extended version of the library in which thousands of 8- to 128-bit approximate arithmetic circuits are included. These circuits form Pareto fronts with respect to several error metrics, power consumption and other circuit parameters. In our case study we show how a large set of approximate multipliers can be used to perform a resilience analysis of a hardware accelerator of ResNet DNN and to select the most suitable approximate multiplier for a given application. Results are reported for various instances of the ResNet DNN trained on CIFAR-10 benchmark problem. 

Druh

D - Stať ve sborníku

CEP obor

—

OECD FORD obor

10201 - Computer sciences, information science, bioinformathics (hardware development to be 2.2, social aspect to be 5.8)

Projekt

<a href="/cs/project/GA19-10137S" target="_blank" >GA19-10137S: Navrhování a využívání knihoven aproximativních obvodů</a><br>

Návaznosti

P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Rok uplatnění

2020

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název statě ve sborníku

2nd IEEE International Conference on Artificial Intelligence Circuits and Systems

ISBN

978-1-7281-4922-6

ISSN

—

e-ISSN

—

Počet stran výsledku

5

Strana od-do

243-247

Název nakladatele

Institute of Electrical and Electronics Engineers

Místo vydání

Genoa

Místo konání akce

Genoa

Datum konání akce

23. 3. 2020

Typ akce podle státní příslušnosti

WRD - Celosvětová akce

Kód UT WoS článku

000720328700055