Analysis of Software-Implemented Fault Tolerance: Case Study on Smart Lock

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F20%3APU138628" target="_blank" >RIV/00216305:26230/20:PU138628 - isvavai.cz</a>

Výsledek na webu

<a href="https://www.fit.vut.cz/research/publication/12322/" target="_blank" >https://www.fit.vut.cz/research/publication/12322/</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.1109/EWDTS50664.2020.9224878" target="_blank" >10.1109/EWDTS50664.2020.9224878</a>

Jazyk výsledku

angličtina

Název v původním jazyce

Analysis of Software-Implemented Fault Tolerance: Case Study on Smart Lock

Popis výsledku v původním jazyce

In our research, we focus on Fault-Tolerant system design and testing. Recently, we also studied Fault Tolerance against random and deliberate faults of electronic smart locks. In our last research, we tested Software-Implemented Fault Tolerance in the controller of a smart electronic lock. We found out that the most sensitive part is the Instruction Memory, but also that our hardening proved to have only negligible effects on the resulting fault tolerance. In this paper, we extend our experiments and provide further analysis of potential pitfalls when hardening using SIFT. We found out that added hardness may improve resilience to faults. But also, the resilience may be instantly worsened by other factors, such as increased bus traffic. In our research we found out, that our hardening did not improve the resiliency to faults most likely due to the increased bus traffic. This means that it is always important to consider the complete system and also the parts of the system that are easily overlooked.

Název v anglickém jazyce

Analysis of Software-Implemented Fault Tolerance: Case Study on Smart Lock

Popis výsledku anglicky

In our research, we focus on Fault-Tolerant system design and testing. Recently, we also studied Fault Tolerance against random and deliberate faults of electronic smart locks. In our last research, we tested Software-Implemented Fault Tolerance in the controller of a smart electronic lock. We found out that the most sensitive part is the Instruction Memory, but also that our hardening proved to have only negligible effects on the resulting fault tolerance. In this paper, we extend our experiments and provide further analysis of potential pitfalls when hardening using SIFT. We found out that added hardness may improve resilience to faults. But also, the resilience may be instantly worsened by other factors, such as increased bus traffic. In our research we found out, that our hardening did not improve the resiliency to faults most likely due to the increased bus traffic. This means that it is always important to consider the complete system and also the parts of the system that are easily overlooked.

Druh

D - Stať ve sborníku

CEP obor

—

OECD FORD obor

20206 - Computer hardware and architecture

Projekt

Výsledek vznikl pri realizaci vícero projektů. Více informací v záložce Projekty.

Návaznosti

P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)<br>S - Specificky vyzkum na vysokych skolach

Rok uplatnění

2020

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název statě ve sborníku

2020 IEEE East-West Design and Test Symposium, EWDTS 2020 - Proceedings

ISBN

978-1-7281-9899-6

ISSN

—

e-ISSN

—

Počet stran výsledku

5

Strana od-do

24-28

Název nakladatele

Institute of Electrical and Electronics Engineers

Místo vydání

Varna

Místo konání akce

Varna

Datum konání akce

4. 9. 2020

Typ akce podle státní příslušnosti

WRD - Celosvětová akce

Kód UT WoS článku

—