Satisfiability Solving Meets Evolutionary Optimisation in Designing Approximate Circuits

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F20%3APU138634" target="_blank" >RIV/00216305:26230/20:PU138634 - isvavai.cz</a>

Výsledek na webu

<a href="https://www.fit.vut.cz/research/publication/12354/" target="_blank" >https://www.fit.vut.cz/research/publication/12354/</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.1007/978-3-030-51825-7_33" target="_blank" >10.1007/978-3-030-51825-7_33</a>

Jazyk výsledku

angličtina

Název v původním jazyce

Satisfiability Solving Meets Evolutionary Optimisation in Designing Approximate Circuits

Popis výsledku v původním jazyce

Approximate circuits that trade the chip area or power consumption for the precision of the computation play a key role in development of energy-aware systems. Designing complex approximate circuits is, however, very difficult, especially, when a given approximation error has to be guaranteed. Evolutionary search algorithms together with SAT-based error evaluation currently represent one of the most successful approaches for automated circuit approximation. In this paper, we apply satisfiability solving not only for circuit evaluation but also for its minimisation. We consider and evaluate several approaches to this task, both inspired by existing works as well as novel ones. Our experiments show that a combined strategy, integrating evolutionary search and SMT-based sub-circuit minimisation (using quantified theory of arrays) that we propose, is able to find complex approximate circuits (e.g. 16-bit multipliers) with considerably better trade-offs between the circuit precision and size than existing~approaches.

Název v anglickém jazyce

Satisfiability Solving Meets Evolutionary Optimisation in Designing Approximate Circuits

Popis výsledku anglicky

Approximate circuits that trade the chip area or power consumption for the precision of the computation play a key role in development of energy-aware systems. Designing complex approximate circuits is, however, very difficult, especially, when a given approximation error has to be guaranteed. Evolutionary search algorithms together with SAT-based error evaluation currently represent one of the most successful approaches for automated circuit approximation. In this paper, we apply satisfiability solving not only for circuit evaluation but also for its minimisation. We consider and evaluate several approaches to this task, both inspired by existing works as well as novel ones. Our experiments show that a combined strategy, integrating evolutionary search and SMT-based sub-circuit minimisation (using quantified theory of arrays) that we propose, is able to find complex approximate circuits (e.g. 16-bit multipliers) with considerably better trade-offs between the circuit precision and size than existing~approaches.

Druh

D - Stať ve sborníku

CEP obor

—

OECD FORD obor

10201 - Computer sciences, information science, bioinformathics (hardware development to be 2.2, social aspect to be 5.8)

Projekt

<a href="/cs/project/GJ20-02328Y" target="_blank" >GJ20-02328Y: CAQtuS: Počítačem podporovaná kvantitativní syntéza</a><br>

Návaznosti

P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Rok uplatnění

2020

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název statě ve sborníku

Theory and Applications of Satisfiability Testing - SAT 2020

ISBN

978-3-030-51824-0

ISSN

—

e-ISSN

—

Počet stran výsledku

11

Strana od-do

481-491

Název nakladatele

Springer International Publishing

Místo vydání

Alghero

Místo konání akce

Alghero

Datum konání akce

3. 7. 2020

Typ akce podle státní příslušnosti

WRD - Celosvětová akce

Kód UT WoS článku

000711645300033