Measuring and Identifying Aging-Critical Paths in FPGAs

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F46747885%3A24220%2F15%3A%230003446" target="_blank" >RIV/46747885:24220/15:#0003446 - isvavai.cz</a>

Výsledek na webu

<a href="http://www.median-project.eu/events/median2015" target="_blank" >http://www.median-project.eu/events/median2015</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.13140/RG.2.1.3147.4729" target="_blank" >10.13140/RG.2.1.3147.4729</a>

Jazyk výsledku

angličtina

Název v původním jazyce

Measuring and Identifying Aging-Critical Paths in FPGAs

Popis výsledku v původním jazyce

Rapidly growing portfolio of new technologies in design and manufacturing of advanced integrated circuits enabled higher integration of complex structures at ultra-high nano-scale densities and using very deep sub-micron technologies. However, the new devices and circuits are sensitive to negative effects of various changes of the internal nanostructures and their parameters, including aging effects. This time-dependent variation, caused nowadays mainly by NBTI (Negative Bias Temperature Instability), may result in signal propagation slow down along the paths between flip-flops and causing functional failures in the circuit. In this paper we propose an approach to identify and also to measure aging-critical paths on real integrated circuit?s systems innanoscale programmable logic such as FPGAs (Field Programmable Gate Arrays). The approach is based on hierarchical modelling of dynamic NBTI aging related parameters of the basic structural elements in programmable logic. The case study

Název v anglickém jazyce

Measuring and Identifying Aging-Critical Paths in FPGAs

Popis výsledku anglicky

Rapidly growing portfolio of new technologies in design and manufacturing of advanced integrated circuits enabled higher integration of complex structures at ultra-high nano-scale densities and using very deep sub-micron technologies. However, the new devices and circuits are sensitive to negative effects of various changes of the internal nanostructures and their parameters, including aging effects. This time-dependent variation, caused nowadays mainly by NBTI (Negative Bias Temperature Instability), may result in signal propagation slow down along the paths between flip-flops and causing functional failures in the circuit. In this paper we propose an approach to identify and also to measure aging-critical paths on real integrated circuit?s systems innanoscale programmable logic such as FPGAs (Field Programmable Gate Arrays). The approach is based on hierarchical modelling of dynamic NBTI aging related parameters of the basic structural elements in programmable logic. The case study

Druh

O - Ostatní výsledky

CEP obor

JC - Počítačový hardware a software

OECD FORD obor

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Projekt

<a href="/cs/project/LD13019" target="_blank" >LD13019: SPONA - Zvýšení spolehlivosti nanoscale obvodů</a><br>

Návaznosti

P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Rok uplatnění

2015

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů