Sequential Test Decompressors with Fast Tester Bits Wide-Spreading

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F46747885%3A24220%2F17%3A00004250" target="_blank" >RIV/46747885:24220/17:00004250 - isvavai.cz</a>

Výsledek na webu

<a href="http://www.worldscientific.com/doi/pdf/10.1142/S0218126617400011" target="_blank" >http://www.worldscientific.com/doi/pdf/10.1142/S0218126617400011</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.1142/S0218126617400011" target="_blank" >10.1142/S0218126617400011</a>

Jazyk výsledku

angličtina

Název v původním jazyce

Sequential Test Decompressors with Fast Tester Bits Wide-Spreading

Popis výsledku v původním jazyce

Usually, test pattern decompressors with dynamic reseeding are reset before starting a new test pattern decoding. The first few scan chain slices are then filled with test vectors that have lower decoding ability as the number of free variables is limited by the test access mechanism bandwidth. We have found that even within this limitation, it is possible to improve the decodability by creating fast and wide-spreading as many as possible independent linear combinations of the tester bits and using them for the scan chain loading. We evaluated features influencing the decompression quality and the hardware overhead for different decompressor principles. According to the evaluation results, we proposed a decompressor combining a XOR network and a linear feedback shift register (LFSR)-like automaton; we place the XOR network on the LFSR inputs. We demonstrate that due to this arrangement, the combined decompressor can be used without any phase shifter or state skipping ability of the LFSR. We have experimentally verified that adopting the proposed decompressor structure improves test coverage, saves the hardware resources and shortens the test application time.

Název v anglickém jazyce

Sequential Test Decompressors with Fast Tester Bits Wide-Spreading

Popis výsledku anglicky

Usually, test pattern decompressors with dynamic reseeding are reset before starting a new test pattern decoding. The first few scan chain slices are then filled with test vectors that have lower decoding ability as the number of free variables is limited by the test access mechanism bandwidth. We have found that even within this limitation, it is possible to improve the decodability by creating fast and wide-spreading as many as possible independent linear combinations of the tester bits and using them for the scan chain loading. We evaluated features influencing the decompression quality and the hardware overhead for different decompressor principles. According to the evaluation results, we proposed a decompressor combining a XOR network and a linear feedback shift register (LFSR)-like automaton; we place the XOR network on the LFSR inputs. We demonstrate that due to this arrangement, the combined decompressor can be used without any phase shifter or state skipping ability of the LFSR. We have experimentally verified that adopting the proposed decompressor structure improves test coverage, saves the hardware resources and shortens the test application time.

Druh

J_imp - Článek v periodiku v databázi Web of Science

CEP obor

—

OECD FORD obor

20206 - Computer hardware and architecture

Projekt

—

Návaznosti

I - Institucionalni podpora na dlouhodoby koncepcni rozvoj vyzkumne organizace

Rok uplatnění

2017

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název periodika

JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS

ISSN

0218-1266

e-ISSN

—

Svazek periodika

26

Číslo periodika v rámci svazku

8

Stát vydavatele periodika

SG - Singapurská republika

Počet stran výsledku

16

Strana od-do

—

Kód UT WoS článku

000399226200002

EID výsledku v databázi Scopus

2-s2.0-85011536753