Decompressors Using Nonlinear Codes

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F46747885%3A24220%2F20%3A00008441" target="_blank" >RIV/46747885:24220/20:00008441 - isvavai.cz</a>

Výsledek na webu

<a href="https://www.sciencedirect.com/science/article/pii/S0141933119306441" target="_blank" >https://www.sciencedirect.com/science/article/pii/S0141933119306441</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.1016/j.micpro.2020.103076" target="_blank" >10.1016/j.micpro.2020.103076</a>

Jazyk výsledku

angličtina

Název v původním jazyce

Decompressors Using Nonlinear Codes

Popis výsledku v původním jazyce

Test patterns are usually transferred from the tester to the circuit under test in a compressed form as it minimizes test access mechanism bandwidth and transfer time. It was found that nonlinear binary codes could be used for encoding test patterns in a similar way as it is done using linear codes, and the compression efficiency may be higher. The key important characteristic of the nonlinear codes is that the maximum number of codeword bits may be higher than it is obtained for the linear code words while the number of individually specified bits is preserved. It causes better encoding parameters that can be found for the transformation of code words into a test pattern that can feed a circuit under test with a higher number of parallel scan chains. The decompressors placed on a circuit under test transform nonlinear binary code words into test patterns with the help of nonlinear combinational or sequential circuits. In this paper, we propose a relatively fast heuristics that can be used for finding the decompressor nonlinear function truth tables guaranteeing a required number of specified bits within a test pattern. We quantify the benefits and costs of such nonlinear decompressors and verify the benchmark circuit test pattern encoding efficiency.

Název v anglickém jazyce

Decompressors Using Nonlinear Codes

Popis výsledku anglicky

Test patterns are usually transferred from the tester to the circuit under test in a compressed form as it minimizes test access mechanism bandwidth and transfer time. It was found that nonlinear binary codes could be used for encoding test patterns in a similar way as it is done using linear codes, and the compression efficiency may be higher. The key important characteristic of the nonlinear codes is that the maximum number of codeword bits may be higher than it is obtained for the linear code words while the number of individually specified bits is preserved. It causes better encoding parameters that can be found for the transformation of code words into a test pattern that can feed a circuit under test with a higher number of parallel scan chains. The decompressors placed on a circuit under test transform nonlinear binary code words into test patterns with the help of nonlinear combinational or sequential circuits. In this paper, we propose a relatively fast heuristics that can be used for finding the decompressor nonlinear function truth tables guaranteeing a required number of specified bits within a test pattern. We quantify the benefits and costs of such nonlinear decompressors and verify the benchmark circuit test pattern encoding efficiency.

Druh

J_imp - Článek v periodiku v databázi Web of Science

CEP obor

—

OECD FORD obor

20206 - Computer hardware and architecture

Projekt

—

Návaznosti

I - Institucionalni podpora na dlouhodoby koncepcni rozvoj vyzkumne organizace

Rok uplatnění

2020

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název periodika

Microprocessors and Microsystems

ISSN

0141-9331

e-ISSN

—

Svazek periodika

76

Číslo periodika v rámci svazku

JUL 2020

Stát vydavatele periodika

NL - Nizozemsko

Počet stran výsledku

10

Strana od-do

—

Kód UT WoS článku

000538093000012

EID výsledku v databázi Scopus

2-s2.0-85081903030