Fast image recognition based on n-tuple neural networks implemented in an FPGA

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F49777513%3A23220%2F16%3A43927493" target="_blank" >RIV/49777513:23220/16:43927493 - isvavai.cz</a>

Výsledek na webu

<a href="http://link.springer.com/article/10.1007/s11554-013-0331-8" target="_blank" >http://link.springer.com/article/10.1007/s11554-013-0331-8</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.1007/s11554-013-0331-8" target="_blank" >10.1007/s11554-013-0331-8</a>

Jazyk výsledku

angličtina

Název v původním jazyce

Fast image recognition based on n-tuple neural networks implemented in an FPGA

Popis výsledku v původním jazyce

This paper deals with the design and the implementation of an image recognition system based on FPGA devices. It explores an n-tuple methodology using node 'grouping' and the possible advantages offered by this little-known technique. The paper is based on the implementation of this concept by an FPGA device. A novel approach to the organization of the neural networks data in the n-tuple memory is introduced. The system was tested on a real-world recognition task-the recognition of road signs. The test results are presented and discussed. It is concluded that the designed system may be a powerful part of more complex equipment for the solution of many recognition issues.

Název v anglickém jazyce

Fast image recognition based on n-tuple neural networks implemented in an FPGA

Popis výsledku anglicky

This paper deals with the design and the implementation of an image recognition system based on FPGA devices. It explores an n-tuple methodology using node 'grouping' and the possible advantages offered by this little-known technique. The paper is based on the implementation of this concept by an FPGA device. A novel approach to the organization of the neural networks data in the n-tuple memory is introduced. The system was tested on a real-world recognition task-the recognition of road signs. The test results are presented and discussed. It is concluded that the designed system may be a powerful part of more complex equipment for the solution of many recognition issues.

Druh

J_x - Nezařazeno - Článek v odborném periodiku (Jimp, Jsc a Jost)

CEP obor

JA - Elektronika a optoelektronika, elektrotechnika

OECD FORD obor

—

Projekt

<a href="/cs/project/ED2.1.00%2F03.0094" target="_blank" >ED2.1.00/03.0094: Regionální inovační centrum elektrotechniky (RICE)</a><br>

Návaznosti

P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)<br>I - Institucionalni podpora na dlouhodoby koncepcni rozvoj vyzkumne organizace

Rok uplatnění

2016

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název periodika

Journal of Real-Time Image Processing

ISSN

1861-8200

e-ISSN

—

Svazek periodika

11

Číslo periodika v rámci svazku

1

Stát vydavatele periodika

DE - Spolková republika Německo

Počet stran výsledku

12

Strana od-do

155-166

Kód UT WoS článku

000368377800014

EID výsledku v databázi Scopus

2-s2.0-84955668263