Converter power losses computation by FPGA-based HIL simulator

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F49777513%3A23220%2F19%3A43955969" target="_blank" >RIV/49777513:23220/19:43955969 - isvavai.cz</a>

Výsledek na webu

<a href="https://ieeexplore.ieee.org/document/8867006" target="_blank" >https://ieeexplore.ieee.org/document/8867006</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.23919/AE.2019.8867006" target="_blank" >10.23919/AE.2019.8867006</a>

Jazyk výsledku

angličtina

Název v původním jazyce

Converter power losses computation by FPGA-based HIL simulator

Popis výsledku v původním jazyce

Converter losses play a crucial role in the process of power converter design. Especially semiconductor components and heat sink selection are strongly dependent on the total power converter losses and thus affect the power converter size and its price. The most popular techniques for determination of the losses are based on the computer simulation of the power converter. These kinds of simulations could be very time consuming, because on one side, the simulation needs very short steptime for differential equations calculation to model power converter switching. On the other side, the temperature dynamics of heat sink are commonly slow and depend on power cycles of converter. With the help of FPGAbased hardware in the loop (HIL), the simulation could run real-time and it is possible to test different scenarios, different modulation techniques and see their influences on converter losses. This approach can lead to reduction of losses to the state, when it is possible to reduce the size of converter. Furthermore, the HIL simulation could be used for testing and developing control algorithm in real time conditions. It also offers flexibility in the easy change of model parameters and monitoring values which are not or hardly obtainable in real machine. This paper presents the FPGA-based HIL simulator of induction motor drive with three phase voltage source inverter based on Semikron IGBT modules.

Název v anglickém jazyce

Converter power losses computation by FPGA-based HIL simulator

Popis výsledku anglicky

Converter losses play a crucial role in the process of power converter design. Especially semiconductor components and heat sink selection are strongly dependent on the total power converter losses and thus affect the power converter size and its price. The most popular techniques for determination of the losses are based on the computer simulation of the power converter. These kinds of simulations could be very time consuming, because on one side, the simulation needs very short steptime for differential equations calculation to model power converter switching. On the other side, the temperature dynamics of heat sink are commonly slow and depend on power cycles of converter. With the help of FPGAbased hardware in the loop (HIL), the simulation could run real-time and it is possible to test different scenarios, different modulation techniques and see their influences on converter losses. This approach can lead to reduction of losses to the state, when it is possible to reduce the size of converter. Furthermore, the HIL simulation could be used for testing and developing control algorithm in real time conditions. It also offers flexibility in the easy change of model parameters and monitoring values which are not or hardly obtainable in real machine. This paper presents the FPGA-based HIL simulator of induction motor drive with three phase voltage source inverter based on Semikron IGBT modules.

Druh

D - Stať ve sborníku

CEP obor

—

OECD FORD obor

20201 - Electrical and electronic engineering

Projekt

<a href="/cs/project/EF18_069%2F0009855" target="_blank" >EF18_069/0009855: Elektrotechnické technologie s vysokým podílem vestavěné inteligence</a><br>

Návaznosti

P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)<br>S - Specificky vyzkum na vysokych skolach<br>I - Institucionalni podpora na dlouhodoby koncepcni rozvoj vyzkumne organizace

Rok uplatnění

2019

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název statě ve sborníku

International Conference on Applied Electronics (AE 2019) : /proceedings/

ISBN

978-80-261-0813-9

ISSN

1803-7232

e-ISSN

1805-9597

Počet stran výsledku

4

Strana od-do

39-42

Název nakladatele

University of West Bohemia

Místo vydání

Pilsen

Místo konání akce

Pilsen, Czech Republic

Datum konání akce

10. 9. 2019

Typ akce podle státní příslušnosti

WRD - Celosvětová akce

Kód UT WoS článku

000591665200008