NetCOPE, FPGA platforma pro vysokorychlostní sítě

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F63839172%3A_____%2F08%3A00001148" target="_blank" >RIV/63839172:_____/08:00001148 - isvavai.cz</a>

Nalezeny alternativní kódy

RIV/63839172:_____/09:00001148

Výsledek na webu

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DOI - Digital Object Identifier

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Jazyk výsledku

angličtina

Název v původním jazyce

NetCOPE, FPGA Platform for High Speed Networking

Popis výsledku v původním jazyce

Rapid development in network technologies and bandwidth growth to 10Gbps or 40Gbps puts more and more demands on devices which have to process or analyze network traffic. Results of numerous research works show that the performance of conventional processors is not sufficient for variety of network applications. The presentation describes the basic scope of system architecture for rapid development of network applications based on the connection of a processor and an acceleration card. The proposed NetCOPE platform implements typical components which most of the network applications have in common (such as I/O blocks, connection of an application acceleration core to a system bus and fast DMA transfers). Using the platform a designer is concentrated onrealization of the target application only and can easily move implemented designs accross various development boards.

Název v anglickém jazyce

NetCOPE, FPGA Platform for High Speed Networking

Popis výsledku anglicky

Rapid development in network technologies and bandwidth growth to 10Gbps or 40Gbps puts more and more demands on devices which have to process or analyze network traffic. Results of numerous research works show that the performance of conventional processors is not sufficient for variety of network applications. The presentation describes the basic scope of system architecture for rapid development of network applications based on the connection of a processor and an acceleration card. The proposed NetCOPE platform implements typical components which most of the network applications have in common (such as I/O blocks, connection of an application acceleration core to a system bus and fast DMA transfers). Using the platform a designer is concentrated onrealization of the target application only and can easily move implemented designs accross various development boards.

Druh

A - Audiovizuální tvorba

CEP obor

IN - Informatika

OECD FORD obor

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Projekt

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Návaznosti

Z - Vyzkumny zamer (s odkazem do CEZ)

Rok uplatnění

2009

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

ISBN

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Místo vydání

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Název nakladatele resp. objednatele

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Verze

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Identifikační číslo nosiče

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