Framework for Fast Prototyping of Applications running on Reconfigurable Systems on Chip

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F13%3APU106392" target="_blank" >RIV/00216305:26230/13:PU106392 - isvavai.cz</a>

Výsledek na webu

<a href="http://www.fit.vutbr.cz/research/pubs/all.php?id=10393" target="_blank" >http://www.fit.vutbr.cz/research/pubs/all.php?id=10393</a>

DOI - Digital Object Identifier

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Jazyk výsledku

angličtina

Název v původním jazyce

Framework for Fast Prototyping of Applications running on Reconfigurable Systems on Chip

Popis výsledku v původním jazyce

Recently introduced chips with ARM based processors and programmable logic provide huge potential for digital signal processing, networking and other applications. Many IP cores and operating systems have been prepared for these chips to simplify the development process. Nevertheless, the integration of IP cores and operating system is not covered by any development tool yet. Developers have to design, implement and debug the communication between hardware and software part of the application. Therefore we propose Reconfigurable System on Chip (RSoC) Framework to support rapid prototyping of applications running on FPGA chips with a processor. The framework consists of FPGA logic and OS drivers to support communication between application core in the FPGA and application software on the host processor. Moreover, the framework allows to configure automatically address space of components in the FPGA and supports dynamic loading of drivers according to the FPGA configuration. The developer can focus only on the application software and accelerating core. For demonstration purposes, the framework is exploited in the example of a video processing application, where an image filter is running in the software and than is accelerated in the FPGA.

Název v anglickém jazyce

Framework for Fast Prototyping of Applications running on Reconfigurable Systems on Chip

Popis výsledku anglicky

Recently introduced chips with ARM based processors and programmable logic provide huge potential for digital signal processing, networking and other applications. Many IP cores and operating systems have been prepared for these chips to simplify the development process. Nevertheless, the integration of IP cores and operating system is not covered by any development tool yet. Developers have to design, implement and debug the communication between hardware and software part of the application. Therefore we propose Reconfigurable System on Chip (RSoC) Framework to support rapid prototyping of applications running on FPGA chips with a processor. The framework consists of FPGA logic and OS drivers to support communication between application core in the FPGA and application software on the host processor. Moreover, the framework allows to configure automatically address space of components in the FPGA and supports dynamic loading of drivers according to the FPGA configuration. The developer can focus only on the application software and accelerating core. For demonstration purposes, the framework is exploited in the example of a video processing application, where an image filter is running in the software and than is accelerated in the FPGA.

Druh

D - Stať ve sborníku

CEP obor

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OECD FORD obor

20206 - Computer hardware and architecture

Projekt

<a href="/cs/project/VG20102015022" target="_blank" >VG20102015022: Moderní prostředky pro boj s kybernetickou kriminalitou na Internetu nové generace</a><br>

Návaznosti

P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Rok uplatnění

2013

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název statě ve sborníku

Proceedings of the 2013 Conference on Design & Architectures for Signal & Image Processing

ISBN

979-10-92279-01-6

ISSN

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e-ISSN

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Počet stran výsledku

2

Strana od-do

355-356

Název nakladatele

European Electronic Chips & Systems design Initiative

Místo vydání

Cagliari

Místo konání akce

Cagliari

Datum konání akce

8. 10. 2013

Typ akce podle státní příslušnosti

WRD - Celosvětová akce

Kód UT WoS článku

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