An In-sight into How Compression Dictionary Architecture can Affect the Overall Performance in FPGAs

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F63839172%3A_____%2F20%3A10133323" target="_blank" >RIV/63839172:_____/20:10133323 - isvavai.cz</a>

Nalezeny alternativní kódy

RIV/68407700:21240/20:00343067

Výsledek na webu

<a href="https://ieeexplore.ieee.org/document/9217430" target="_blank" >https://ieeexplore.ieee.org/document/9217430</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.1109/ACCESS.2020.3029691" target="_blank" >10.1109/ACCESS.2020.3029691</a>

Jazyk výsledku

angličtina

Název v původním jazyce

An In-sight into How Compression Dictionary Architecture can Affect the Overall Performance in FPGAs

Popis výsledku v původním jazyce

This paper presents a detailed analysis of various approaches to hardware implemented compression algorithm dictionaries, including our optimized method. To obtain comprehensive and detailed results, we introduced a method for the fair comparison of programmable hardware architectures to show the benefits of our approach from the perspective of logic resources, frequency, and latency. We compared two generally used methods with our optimized method, which was found to be more suitable for maintaining the memory content via (in)valid bits in any mid-density memory structures, which are implemented in programmable hardware such as FPGAs (Field Programmable Gate Array). The benefits of our new method based on a &quot;Distributed Memory&quot; technique are shown on a particular example of compression dictionary but the method is also suitable for another use cases requiring a fast (re-)initialization of the used memory structures before each run of an algorithm with minimum time and logic resources consumption. The performance evaluation of the respective approaches has been made in Xilinx ISE and Xilinx Vivado toolkits for the Virtex-7 FPGA family. However the proposed approach is compatible with 99% of modern FPGAs.

Název v anglickém jazyce

An In-sight into How Compression Dictionary Architecture can Affect the Overall Performance in FPGAs

Popis výsledku anglicky

This paper presents a detailed analysis of various approaches to hardware implemented compression algorithm dictionaries, including our optimized method. To obtain comprehensive and detailed results, we introduced a method for the fair comparison of programmable hardware architectures to show the benefits of our approach from the perspective of logic resources, frequency, and latency. We compared two generally used methods with our optimized method, which was found to be more suitable for maintaining the memory content via (in)valid bits in any mid-density memory structures, which are implemented in programmable hardware such as FPGAs (Field Programmable Gate Array). The benefits of our new method based on a &quot;Distributed Memory&quot; technique are shown on a particular example of compression dictionary but the method is also suitable for another use cases requiring a fast (re-)initialization of the used memory structures before each run of an algorithm with minimum time and logic resources consumption. The performance evaluation of the respective approaches has been made in Xilinx ISE and Xilinx Vivado toolkits for the Virtex-7 FPGA family. However the proposed approach is compatible with 99% of modern FPGAs.

Druh

J_imp - Článek v periodiku v databázi Web of Science

CEP obor

—

OECD FORD obor

20206 - Computer hardware and architecture

Projekt

<a href="/cs/project/EF16_013%2F0001797" target="_blank" >EF16_013/0001797: E-infrastruktura CESNET - modernizace</a><br>

Návaznosti

P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Rok uplatnění

2020

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název periodika

IEEE Access

ISSN

2169-3536

e-ISSN

—

Svazek periodika

2020

Číslo periodika v rámci svazku

8

Stát vydavatele periodika

US - Spojené státy americké

Počet stran výsledku

16

Strana od-do

183101-183116

Kód UT WoS článku

000582655900001

EID výsledku v databázi Scopus

2-s2.0-85102788864