The Architecture and the Technology Characterization of an FPGA-Based Customizable Application-Speci?c Vector Coprocessor (ASVP)

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F67985556%3A_____%2F14%3A00429947" target="_blank" >RIV/67985556:_____/14:00429947 - isvavai.cz</a>

Výsledek na webu

<a href="http://dx.doi.org/10.1007/978-1-4614-8800-2" target="_blank" >http://dx.doi.org/10.1007/978-1-4614-8800-2</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.1007/978-1-4614-8800-2" target="_blank" >10.1007/978-1-4614-8800-2</a>

Jazyk výsledku

angličtina

Název v původním jazyce

The Architecture and the Technology Characterization of an FPGA-Based Customizable Application-Speci?c Vector Coprocessor (ASVP)

Popis výsledku v původním jazyce

The job of a computer architect is to build a bridge between what can be effectively built and what can be programmed effectively so that in the end application performance is optimized [1]. Indeed, in the last decade we have seen a wide deployment of parallel architectures in the form of chip-level scalar general-purpose multiprocessors (CMP) and streaming processors (GPU), but this was not met with a generally accepted solution to the problem of programming these systems in some unified manner. Examples of the programming interfaces include OpenMP, MPI (for CMPs), and OpenCL, CUDA (for GPUs). Thus we see that a compute architecture has to be designed in such a way to allow an efficient programming and applications development.

Název v anglickém jazyce

The Architecture and the Technology Characterization of an FPGA-Based Customizable Application-Speci?c Vector Coprocessor (ASVP)

Popis výsledku anglicky

The job of a computer architect is to build a bridge between what can be effectively built and what can be programmed effectively so that in the end application performance is optimized [1]. Indeed, in the last decade we have seen a wide deployment of parallel architectures in the form of chip-level scalar general-purpose multiprocessors (CMP) and streaming processors (GPU), but this was not met with a generally accepted solution to the problem of programming these systems in some unified manner. Examples of the programming interfaces include OpenMP, MPI (for CMPs), and OpenCL, CUDA (for GPUs). Thus we see that a compute architecture has to be designed in such a way to allow an efficient programming and applications development.

Druh

C - Kapitola v odborné knize

CEP obor

JC - Počítačový hardware a software

OECD FORD obor

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Projekt

<a href="/cs/project/7H10001" target="_blank" >7H10001: Smart Multicore Embedded SYstems</a><br>

Návaznosti

P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Rok uplatnění

2014

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název knihy nebo sborníku

Smart Multicore Embedded Systems

ISBN

978-1-4614-8799-9

Počet stran výsledku

33

Strana od-do

45-77

Počet stran knihy

175

Název nakladatele

Springer

Místo vydání

New York

Kód UT WoS kapitoly

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