Fast Hardware Implementation of NNSU Separating Algorithm

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F67985807%3A_____%2F14%3A00446430" target="_blank" >RIV/67985807:_____/14:00446430 - isvavai.cz</a>

Výsledek na webu

<a href="http://dx.doi.org/10.1109/RTC.2014.7097405" target="_blank" >http://dx.doi.org/10.1109/RTC.2014.7097405</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.1109/RTC.2014.7097405" target="_blank" >10.1109/RTC.2014.7097405</a>

Jazyk výsledku

angličtina

Název v původním jazyce

Fast Hardware Implementation of NNSU Separating Algorithm

Popis výsledku v původním jazyce

This paper has two objectives. First, we introduce a separation algorithm of a neural network with switching units (NNSU), and present its applicability to processing selected MonteCarlo (MC) data channels of the LHC detector in CERN Geneve and selectedMC data of DO-detector in FNAL. The result achieved by this algorithm provides better separation of signal and background events than classical cut-based methods and the separation result is comparable to TMVA ROOT methods, such as BDT and MLP. The training phase of NNSU uses a genetic optimization of NNSU architecture, hence a convenient definition of corresponding fitness function allows for refinement of separation results to meet user defined requirements. In the next parts we discuss the possibility of efficient hardware implementation. NNSU algorithm is in fact a piecewise linear discrimination and, therefore, testing phase of the algorithm can be performed by hardware means. First step toward hardware implementation was done, and

Název v anglickém jazyce

Fast Hardware Implementation of NNSU Separating Algorithm

Popis výsledku anglicky

This paper has two objectives. First, we introduce a separation algorithm of a neural network with switching units (NNSU), and present its applicability to processing selected MonteCarlo (MC) data channels of the LHC detector in CERN Geneve and selectedMC data of DO-detector in FNAL. The result achieved by this algorithm provides better separation of signal and background events than classical cut-based methods and the separation result is comparable to TMVA ROOT methods, such as BDT and MLP. The training phase of NNSU uses a genetic optimization of NNSU architecture, hence a convenient definition of corresponding fitness function allows for refinement of separation results to meet user defined requirements. In the next parts we discuss the possibility of efficient hardware implementation. NNSU algorithm is in fact a piecewise linear discrimination and, therefore, testing phase of the algorithm can be performed by hardware means. First step toward hardware implementation was done, and

Druh

D - Stať ve sborníku

CEP obor

IN - Informatika

OECD FORD obor

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Projekt

Výsledek vznikl pri realizaci vícero projektů. Více informací v záložce Projekty.

Návaznosti

I - Institucionalni podpora na dlouhodoby koncepcni rozvoj vyzkumne organizace

Rok uplatnění

2014

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název statě ve sborníku

Real Time Conference (RT)

ISBN

978-1-4799-3659-5

ISSN

—

e-ISSN

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Počet stran výsledku

8

Strana od-do

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Název nakladatele

IEEE

Místo vydání

Piscataway

Místo konání akce

Nara

Datum konání akce

23. 5. 2014

Typ akce podle státní příslušnosti

WRD - Celosvětová akce

Kód UT WoS článku

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