TEST PATTERNS COMPRESSION TECHNIQUES BASED ON SAT SOLVING FOR SCAN-BASED DIGITAL CIRCUITS
Identifikátory výsledku
Kód výsledku v IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F09%3A00159034" target="_blank" >RIV/68407700:21230/09:00159034 - isvavai.cz</a>
Výsledek na webu
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DOI - Digital Object Identifier
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Alternativní jazyky
Jazyk výsledku
angličtina
Název v původním jazyce
TEST PATTERNS COMPRESSION TECHNIQUES BASED ON SAT SOLVING FOR SCAN-BASED DIGITAL CIRCUITS
Popis výsledku v původním jazyce
In the paper we propose a new method of test patterns compression based on SAT (SATisfiability) solving. By test patterns compression we can dramatically decrease test memory requirements for test patterns storing. This compression method is very suitable for scan-based digital circuits. Test patterns are decompressed in the scan chain during the test, no additional hardware is required. By this way we can also decrease the data bandwidth between ATE (Automatic Test Equipment) and the internal test mechanism. The main idea is based on test patterns overlapping introduced in the COMPAS (COMpressed Pattern Sequencer) compression tool [1]. Our proposed algorithm is based, as well as COMPAS, on patterns overlapping. During the test generation, we are trying to efficiently generate vectors as candidates for an overlap, unlike COMPAS, which is based on efficient overlapping of pre-generated test patterns. The results are compared with the COMPAS compression tool.
Název v anglickém jazyce
TEST PATTERNS COMPRESSION TECHNIQUES BASED ON SAT SOLVING FOR SCAN-BASED DIGITAL CIRCUITS
Popis výsledku anglicky
In the paper we propose a new method of test patterns compression based on SAT (SATisfiability) solving. By test patterns compression we can dramatically decrease test memory requirements for test patterns storing. This compression method is very suitable for scan-based digital circuits. Test patterns are decompressed in the scan chain during the test, no additional hardware is required. By this way we can also decrease the data bandwidth between ATE (Automatic Test Equipment) and the internal test mechanism. The main idea is based on test patterns overlapping introduced in the COMPAS (COMpressed Pattern Sequencer) compression tool [1]. Our proposed algorithm is based, as well as COMPAS, on patterns overlapping. During the test generation, we are trying to efficiently generate vectors as candidates for an overlap, unlike COMPAS, which is based on efficient overlapping of pre-generated test patterns. The results are compared with the COMPAS compression tool.
Klasifikace
Druh
D - Stať ve sborníku
CEP obor
JC - Počítačový hardware a software
OECD FORD obor
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Návaznosti výsledku
Projekt
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Návaznosti
Z - Vyzkumny zamer (s odkazem do CEZ)
Ostatní
Rok uplatnění
2009
Kód důvěrnosti údajů
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Údaje specifické pro druh výsledku
Název statě ve sborníku
Počítačové architektury a diagnostika 2009
ISBN
978-80-7318-847-4
ISSN
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e-ISSN
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Počet stran výsledku
6
Strana od-do
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Název nakladatele
Universita Tomáše Bati ve Zlíně
Místo vydání
Zlín
Místo konání akce
Soláň
Datum konání akce
9. 9. 2009
Typ akce podle státní příslušnosti
CST - Celostátní akce
Kód UT WoS článku
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