Combining PREM compilation and ILP scheduling for high-performance and predictable MPSoC execution

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F18%3A00323847" target="_blank" >RIV/68407700:21230/18:00323847 - isvavai.cz</a>

Nalezeny alternativní kódy

RIV/68407700:21730/18:00323847

Výsledek na webu

<a href="http://dx.doi.org/10.1145/3178442.3178444" target="_blank" >http://dx.doi.org/10.1145/3178442.3178444</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.1145/3178442.3178444" target="_blank" >10.1145/3178442.3178444</a>

Jazyk výsledku

angličtina

Název v původním jazyce

Combining PREM compilation and ILP scheduling for high-performance and predictable MPSoC execution

Popis výsledku v původním jazyce

Many applications require both high performance and predictable timing. High-performance can be provided by COTS Multi-Core System on Chips (MPSoC), however, as cores in these systems share the memory bandwidth they are susceptible to interference from each other, which is a problem for timing predictability. We achieve predictability on multi-cores by employing the predictable execution model (PREM), which splits execution into a sequence of memory and compute phases, and schedules these such that only a single core is executing a memory phase at a time. We present a toolchain consisting of a compiler and an Integer Linear Programming scheduling model. Our compiler uses loop analysis and tiling to transform application code into PREM compliant binaries. Furthermore, we solve the problem of scheduling execution on multiple cores while preventing interference of memory phases. We evaluate our toolchain on Advanced-Driver-Assistance-Systems-like scenario containing matrix multiplications and FFT computations on NVIDIA TX1. The results show that our approach maintains similar average performance and improves variance of completion times by a factor of 9.

Název v anglickém jazyce

Combining PREM compilation and ILP scheduling for high-performance and predictable MPSoC execution

Popis výsledku anglicky

Many applications require both high performance and predictable timing. High-performance can be provided by COTS Multi-Core System on Chips (MPSoC), however, as cores in these systems share the memory bandwidth they are susceptible to interference from each other, which is a problem for timing predictability. We achieve predictability on multi-cores by employing the predictable execution model (PREM), which splits execution into a sequence of memory and compute phases, and schedules these such that only a single core is executing a memory phase at a time. We present a toolchain consisting of a compiler and an Integer Linear Programming scheduling model. Our compiler uses loop analysis and tiling to transform application code into PREM compliant binaries. Furthermore, we solve the problem of scheduling execution on multiple cores while preventing interference of memory phases. We evaluate our toolchain on Advanced-Driver-Assistance-Systems-like scenario containing matrix multiplications and FFT computations on NVIDIA TX1. The results show that our approach maintains similar average performance and improves variance of completion times by a factor of 9.

Druh

D - Stať ve sborníku

CEP obor

—

OECD FORD obor

10201 - Computer sciences, information science, bioinformathics (hardware development to be 2.2, social aspect to be 5.8)

Projekt

—

Návaznosti

R - Projekt Ramcoveho programu EK

Rok uplatnění

2018

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název statě ve sborníku

Proceedings of the 9th International Workshop on Programming Models and Applications for Multicores and Manycores

ISBN

978-1-4503-5645-9

ISSN

—

e-ISSN

—

Počet stran výsledku

10

Strana od-do

11-20

Název nakladatele

Association for Computing Machinery

Místo vydání

New York

Místo konání akce

Vídeň

Datum konání akce

24. 2. 2018

Typ akce podle státní příslušnosti

WRD - Celosvětová akce

Kód UT WoS článku

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