Fault Recovery Method with High Availability for Practical Applications
Identifikátory výsledku
Kód výsledku v IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21240%2F14%3A00221551" target="_blank" >RIV/68407700:21240/14:00221551 - isvavai.cz</a>
Výsledek na webu
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DOI - Digital Object Identifier
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Alternativní jazyky
Jazyk výsledku
angličtina
Název v původním jazyce
Fault Recovery Method with High Availability for Practical Applications
Popis výsledku v původním jazyce
Our research is focused on mission critical applications using SRAM based Field Programmable Gate Arrays (FPGAs).The main goal is to reach higher availability and dependability and low power using unreliable components (FPGAs) with respect to highest safety according to strict Czech standards. Our methodology is designed for fast applicatons and rapid prorotyping of modular systems, which are useful for fast development thanks to its regulars structure. The methodology combines Concurrent Error Detection (CED) techniques, FPGA dynamic recondfigurations and our previously designed Modified Duplex Systems (MDS) architecture. The methodology tries minimizes area overhead. It is aimed for practical applications of modular systems, which are composed from blocks. We applied and tested it on the safety railway station system. The proposed method is based on static and partial dynamic reconfiguration of totally self-checking blocks which allows a full recovery from a Single Even Upset (SEU).
Název v anglickém jazyce
Fault Recovery Method with High Availability for Practical Applications
Popis výsledku anglicky
Our research is focused on mission critical applications using SRAM based Field Programmable Gate Arrays (FPGAs).The main goal is to reach higher availability and dependability and low power using unreliable components (FPGAs) with respect to highest safety according to strict Czech standards. Our methodology is designed for fast applicatons and rapid prorotyping of modular systems, which are useful for fast development thanks to its regulars structure. The methodology combines Concurrent Error Detection (CED) techniques, FPGA dynamic recondfigurations and our previously designed Modified Duplex Systems (MDS) architecture. The methodology tries minimizes area overhead. It is aimed for practical applications of modular systems, which are composed from blocks. We applied and tested it on the safety railway station system. The proposed method is based on static and partial dynamic reconfiguration of totally self-checking blocks which allows a full recovery from a Single Even Upset (SEU).
Klasifikace
Druh
D - Stať ve sborníku
CEP obor
JC - Počítačový hardware a software
OECD FORD obor
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Návaznosti výsledku
Projekt
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Návaznosti
S - Specificky vyzkum na vysokych skolach
Ostatní
Rok uplatnění
2014
Kód důvěrnosti údajů
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Údaje specifické pro druh výsledku
Název statě ve sborníku
MEMICS proceedings
ISBN
978-80-214-5022-6
ISSN
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e-ISSN
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Počet stran výsledku
1
Strana od-do
127
Název nakladatele
NOVPRESS
Místo vydání
Brno
Místo konání akce
Telč
Datum konání akce
17. 10. 2014
Typ akce podle státní příslušnosti
EUR - Evropská akce
Kód UT WoS článku
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