Fully-balanced four-terminal floating nullor for ultra-low voltage analogue filter design

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21460%2F17%3A00320883" target="_blank" >RIV/68407700:21460/17:00320883 - isvavai.cz</a>

Výsledek na webu

<a href="http://mr.crossref.org/iPage?doi=10.1049%2Fiet-cds.2016.0212" target="_blank" >http://mr.crossref.org/iPage?doi=10.1049%2Fiet-cds.2016.0212</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.1049/iet-cds.2016.0212" target="_blank" >10.1049/iet-cds.2016.0212</a>

Jazyk výsledku

angličtina

Název v původním jazyce

Fully-balanced four-terminal floating nullor for ultra-low voltage analogue filter design

Popis výsledku v původním jazyce

This study presents a new complementary metal-oxide-semiconductor (CMOS) structure for a fully balanced four-terminal floating nullor (FBFTFN) which is suitable for ultra-low-voltage and low-power applications. This structure employs a bulk-driven quasi-floating-gate (BD-QFG) metal-oxide-semiconductor transistor technique to provide the capability of ultra-low-voltage, low-power operations as well as extended input voltage range. The functionality of the proposed circuits is demonstrated through simulations using SPICE and TSMC 0.18 mu m n-well CMOS technology with supply voltage of 0.5 V and dissipation power of 9.4 mu W. To confirm the attractive features of the proposed circuit, the fully balanced filters such as band-pass Sallen-Key filter, voltage-mode universal biquadratic filter and current-mode sixth-order low-pass filter using proposed BD-QFG FBFTFN as active elements have been designed.

Název v anglickém jazyce

Fully-balanced four-terminal floating nullor for ultra-low voltage analogue filter design

Popis výsledku anglicky

This study presents a new complementary metal-oxide-semiconductor (CMOS) structure for a fully balanced four-terminal floating nullor (FBFTFN) which is suitable for ultra-low-voltage and low-power applications. This structure employs a bulk-driven quasi-floating-gate (BD-QFG) metal-oxide-semiconductor transistor technique to provide the capability of ultra-low-voltage, low-power operations as well as extended input voltage range. The functionality of the proposed circuits is demonstrated through simulations using SPICE and TSMC 0.18 mu m n-well CMOS technology with supply voltage of 0.5 V and dissipation power of 9.4 mu W. To confirm the attractive features of the proposed circuit, the fully balanced filters such as band-pass Sallen-Key filter, voltage-mode universal biquadratic filter and current-mode sixth-order low-pass filter using proposed BD-QFG FBFTFN as active elements have been designed.

Druh

J_imp - Článek v periodiku v databázi Web of Science

CEP obor

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OECD FORD obor

20201 - Electrical and electronic engineering

Projekt

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Návaznosti

I - Institucionalni podpora na dlouhodoby koncepcni rozvoj vyzkumne organizace

Rok uplatnění

2017

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název periodika

IET Circuits, Devices & Systems

ISSN

1751-858X

e-ISSN

1751-8598

Svazek periodika

11

Číslo periodika v rámci svazku

2

Stát vydavatele periodika

GB - Spojené království Velké Británie a Severního Irska

Počet stran výsledku

10

Strana od-do

173-182

Kód UT WoS článku

000398049800008

EID výsledku v databázi Scopus

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