Practical Design and Evaluation of Fractional-Order Oscillator Using Differential Voltage Current Conveyors

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F16%3APU116862" target="_blank" >RIV/00216305:26220/16:PU116862 - isvavai.cz</a>

Výsledek na webu

<a href="http://dx.doi.org/10.1007/s00034-016-0243-5" target="_blank" >http://dx.doi.org/10.1007/s00034-016-0243-5</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.1007/s00034-016-0243-5" target="_blank" >10.1007/s00034-016-0243-5</a>

Jazyk výsledku

angličtina

Název v původním jazyce

Practical Design and Evaluation of Fractional-Order Oscillator Using Differential Voltage Current Conveyors

Popis výsledku v původním jazyce

This paper deals with the design, analysis, computer simulation, and experimental measurement of fractional order sinusoidal oscillator with two current conveyors, two resistors, and two fractional immittance elements. The used conveyor is based on the bulk-driven quasi-floating-gate (BD-QFG) technique in order to offer high threshold-to-supply voltage ratio and maximum input-to-supply voltage ratio. The supply voltage of the oscillator is 1 V and the power consumption is 74 µW, hence the proposed oscillator can be suitable for biomedical, portable, battery powered and other applications where the low-power consumption is critical. A number of equations along with graphs describing the theoretical properties of the oscillator are presented. The unique features of fractional order oscillator are highlighted considering practical utilization, element computation, tuning, phase shift of output signals, sensitivities, etc. The simulations performed in the Cadence environment and the measurements of a real chip confirm the attractive features of the proposed oscillator.

Název v anglickém jazyce

Practical Design and Evaluation of Fractional-Order Oscillator Using Differential Voltage Current Conveyors

Popis výsledku anglicky

This paper deals with the design, analysis, computer simulation, and experimental measurement of fractional order sinusoidal oscillator with two current conveyors, two resistors, and two fractional immittance elements. The used conveyor is based on the bulk-driven quasi-floating-gate (BD-QFG) technique in order to offer high threshold-to-supply voltage ratio and maximum input-to-supply voltage ratio. The supply voltage of the oscillator is 1 V and the power consumption is 74 µW, hence the proposed oscillator can be suitable for biomedical, portable, battery powered and other applications where the low-power consumption is critical. A number of equations along with graphs describing the theoretical properties of the oscillator are presented. The unique features of fractional order oscillator are highlighted considering practical utilization, element computation, tuning, phase shift of output signals, sensitivities, etc. The simulations performed in the Cadence environment and the measurements of a real chip confirm the attractive features of the proposed oscillator.

Druh

J_imp - Článek v periodiku v databázi Web of Science

CEP obor

—

OECD FORD obor

20201 - Electrical and electronic engineering

Projekt

Výsledek vznikl pri realizaci vícero projektů. Více informací v záložce Projekty.

Návaznosti

P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Rok uplatnění

2016

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název periodika

CIRCUITS SYSTEMS AND SIGNAL PROCESSING

ISSN

0278-081X

e-ISSN

1531-5878

Svazek periodika

2016 (35)

Číslo periodika v rámci svazku

6, IF: 1.178

Stát vydavatele periodika

US - Spojené státy americké

Počet stran výsledku

14

Strana od-do

2003-2016

Kód UT WoS článku

000373566100011

EID výsledku v databázi Scopus

2-s2.0-84962366086