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A Contribution to Printed Circuit Boards' Miniaturization by the Vertical Embedding of Passive Components

Identifikátory výsledku

  • Kód výsledku v IS VaVaI

    <a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F24%3APU149175" target="_blank" >RIV/00216305:26220/24:PU149175 - isvavai.cz</a>

  • Výsledek na webu

    <a href="https://asmedigitalcollection.asme.org/electronicpackaging/article/146/1/011004/1163287/A-Contribution-to-Printed-Circuit-Boards" target="_blank" >https://asmedigitalcollection.asme.org/electronicpackaging/article/146/1/011004/1163287/A-Contribution-to-Printed-Circuit-Boards</a>

  • DOI - Digital Object Identifier

    <a href="http://dx.doi.org/10.1115/1.4062470" target="_blank" >10.1115/1.4062470</a>

Alternativní jazyky

  • Jazyk výsledku

    angličtina

  • Název v původním jazyce

    A Contribution to Printed Circuit Boards' Miniaturization by the Vertical Embedding of Passive Components

  • Popis výsledku v původním jazyce

    This study describes a novel and unconventional approach for embedding passive surface mounted device (SMD) components into printed circuit boards. Therefore, passive components whose package size is 0201 are embedded in two types of vias. On the final quality of an embedded passive component, the effects of various technological factors, including tin-lead and lead-free solder pastes, various types and dimensions of vias, various soldering techniques, and sample positions during the reflow process, have been investigated and described. The results show the impact of tin-lead solder paste and polymeric solder paste on the creation of electrical shorts in the embedding of passive components. The application of microvias for the embedding of passive components eliminates the fundamental issues, such as electrical shorts, component dislocation, and the low success rate for creating a reliable solder joint. The proposed method for miniaturizing printed circuit boards by embedding passive components in microvias was verified by experimental results. The reliability of the proposed methodology is further supported by electrical measurements. This study describes an approach suitable to printed circuit board (PCB) prototyping that makes a negligible contribution to hardware design and electronic technologies.

  • Název v anglickém jazyce

    A Contribution to Printed Circuit Boards' Miniaturization by the Vertical Embedding of Passive Components

  • Popis výsledku anglicky

    This study describes a novel and unconventional approach for embedding passive surface mounted device (SMD) components into printed circuit boards. Therefore, passive components whose package size is 0201 are embedded in two types of vias. On the final quality of an embedded passive component, the effects of various technological factors, including tin-lead and lead-free solder pastes, various types and dimensions of vias, various soldering techniques, and sample positions during the reflow process, have been investigated and described. The results show the impact of tin-lead solder paste and polymeric solder paste on the creation of electrical shorts in the embedding of passive components. The application of microvias for the embedding of passive components eliminates the fundamental issues, such as electrical shorts, component dislocation, and the low success rate for creating a reliable solder joint. The proposed method for miniaturizing printed circuit boards by embedding passive components in microvias was verified by experimental results. The reliability of the proposed methodology is further supported by electrical measurements. This study describes an approach suitable to printed circuit board (PCB) prototyping that makes a negligible contribution to hardware design and electronic technologies.

Klasifikace

  • Druh

    J<sub>imp</sub> - Článek v periodiku v databázi Web of Science

  • CEP obor

  • OECD FORD obor

    20201 - Electrical and electronic engineering

Návaznosti výsledku

  • Projekt

  • Návaznosti

    S - Specificky vyzkum na vysokych skolach

Ostatní

  • Rok uplatnění

    2024

  • Kód důvěrnosti údajů

    S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Údaje specifické pro druh výsledku

  • Název periodika

    JOURNAL OF ELECTRONIC PACKAGING

  • ISSN

    1043-7398

  • e-ISSN

    1528-9044

  • Svazek periodika

    146

  • Číslo periodika v rámci svazku

    1

  • Stát vydavatele periodika

    US - Spojené státy americké

  • Počet stran výsledku

    12

  • Strana od-do

    „011004-1“-„011004-12“

  • Kód UT WoS článku

    001154980300004

  • EID výsledku v databázi Scopus

    2-s2.0-85175302134