Towards Evolvable Systems Based on the Xilinx Zynq Platform

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F13%3APU106296" target="_blank" >RIV/00216305:26230/13:PU106296 - isvavai.cz</a>

Výsledek na webu

<a href="http://www.fit.vutbr.cz/research/pubs/all.php?id=10194" target="_blank" >http://www.fit.vutbr.cz/research/pubs/all.php?id=10194</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.1109/ICES.2013.6613287" target="_blank" >10.1109/ICES.2013.6613287</a>

Jazyk výsledku

angličtina

Název v původním jazyce

Towards Evolvable Systems Based on the Xilinx Zynq Platform

Popis výsledku v původním jazyce

Field programmable gate arrays (FPGAs) are considered as a good platform for digital evolvable hardware systems. Researchers introduced virtual reconfigurable circuits as the response to the insufficient support of partial reconfiguration in early FPGAs. Later, the features of FPGAs allowed the designers to develop evolvable systems fully exploiting native reconfiguration infrastructures. Xilinx recently introduced a new platform called Zynq-7000 all programmable (AP) system-on-chip (SoC) which has the potential to become the next revolutionary step in evolvable hardware design. The paper analyzes Zynq-7000 AP SoC from the perspective of an evolvable hardware designer. Several scenarios are described of how to implement evolvable systems on a developmental board equipped with this programmable SoC. These scenarios are evaluated in terms of area overhead, execution time, reconfiguration time and throughput. The resulting observations should be useful for those who are going to develop real-world evolvable systems on the Zynq-7000 AP SoC platform.

Název v anglickém jazyce

Towards Evolvable Systems Based on the Xilinx Zynq Platform

Popis výsledku anglicky

Field programmable gate arrays (FPGAs) are considered as a good platform for digital evolvable hardware systems. Researchers introduced virtual reconfigurable circuits as the response to the insufficient support of partial reconfiguration in early FPGAs. Later, the features of FPGAs allowed the designers to develop evolvable systems fully exploiting native reconfiguration infrastructures. Xilinx recently introduced a new platform called Zynq-7000 all programmable (AP) system-on-chip (SoC) which has the potential to become the next revolutionary step in evolvable hardware design. The paper analyzes Zynq-7000 AP SoC from the perspective of an evolvable hardware designer. Several scenarios are described of how to implement evolvable systems on a developmental board equipped with this programmable SoC. These scenarios are evaluated in terms of area overhead, execution time, reconfiguration time and throughput. The resulting observations should be useful for those who are going to develop real-world evolvable systems on the Zynq-7000 AP SoC platform.

Druh

D - Stať ve sborníku

CEP obor

—

OECD FORD obor

20206 - Computer hardware and architecture

Projekt

Výsledek vznikl pri realizaci vícero projektů. Více informací v záložce Projekty.

Návaznosti

P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Rok uplatnění

2013

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název statě ve sborníku

2013 IEEE International Conference on Evolvable Systems (ICES)

ISBN

978-1-4673-5869-9

ISSN

—

e-ISSN

—

Počet stran výsledku

7

Strana od-do

89-95

Název nakladatele

IEEE Computational Intelligence Society

Místo vydání

Singapur

Místo konání akce

Singapore

Datum konání akce

15. 4. 2013

Typ akce podle státní příslušnosti

WRD - Celosvětová akce

Kód UT WoS článku

—