Mitigating Curtaining Artifacts During Ga FIB TEM Lamella Preparation of a 14 nm FinFET Device

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26620%2F17%3APU128833" target="_blank" >RIV/00216305:26620/17:PU128833 - isvavai.cz</a>

Výsledek na webu

<a href="https://www.cambridge.org/core/journals/microscopy-and-microanalysis/article/mitigating-curtaining-artifacts-during-ga-fib-tem-lamella-preparation-of-a-14-nm-finfet-device/072B2738731C7CE8D6680EF27CC69797" target="_blank" >https://www.cambridge.org/core/journals/microscopy-and-microanalysis/article/mitigating-curtaining-artifacts-during-ga-fib-tem-lamella-preparation-of-a-14-nm-finfet-device/072B2738731C7CE8D6680EF27CC69797</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.1017/S1431927617000241" target="_blank" >10.1017/S1431927617000241</a>

Jazyk výsledku

angličtina

Název v původním jazyce

Mitigating Curtaining Artifacts During Ga FIB TEM Lamella Preparation of a 14 nm FinFET Device

Popis výsledku v původním jazyce

We report on the mitigation of curtaining artifacts during transmission electron microscopy (TEM) lamella preparation by means of a modified ion beam milling approach, which involves altering the incident angle of the Ga ions by rocking of the sample on a special stage. We applied this technique to TEM sample preparation of a state-of-the-art integrated circuit based on a 14-nm technology node. Site-specific lamellae with a thickness <15 nm were prepared by top-down Ga focused ion beam polishing through upper metal contacts. The lamellae were analyzed by means of high-resolution TEM, which showed a clear transistor structure and confirmed minimal curtaining artifacts. The results are compared with a standard inverted thinning preparation technique.

Název v anglickém jazyce

Mitigating Curtaining Artifacts During Ga FIB TEM Lamella Preparation of a 14 nm FinFET Device

Popis výsledku anglicky

We report on the mitigation of curtaining artifacts during transmission electron microscopy (TEM) lamella preparation by means of a modified ion beam milling approach, which involves altering the incident angle of the Ga ions by rocking of the sample on a special stage. We applied this technique to TEM sample preparation of a state-of-the-art integrated circuit based on a 14-nm technology node. Site-specific lamellae with a thickness <15 nm were prepared by top-down Ga focused ion beam polishing through upper metal contacts. The lamellae were analyzed by means of high-resolution TEM, which showed a clear transistor structure and confirmed minimal curtaining artifacts. The results are compared with a standard inverted thinning preparation technique.

Druh

J_imp - Článek v periodiku v databázi Web of Science

CEP obor

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OECD FORD obor

20501 - Materials engineering

Projekt

<a href="/cs/project/ED1.1.00%2F02.0068" target="_blank" >ED1.1.00/02.0068: CEITEC - central european institute of technology</a><br>

Návaznosti

P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Rok uplatnění

2017

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název periodika

MICROSCOPY AND MICROANALYSIS

ISSN

1431-9276

e-ISSN

1435-8115

Svazek periodika

23

Číslo periodika v rámci svazku

3

Stát vydavatele periodika

US - Spojené státy americké

Počet stran výsledku

10

Strana od-do

484-490

Kód UT WoS článku

000407562200004

EID výsledku v databázi Scopus

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