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Analyzing the Impact of Surface Treatment on Solder Joint Voids

Identifikátory výsledku

  • Kód výsledku v IS VaVaI

    <a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F49777513%3A23220%2F24%3A43972533" target="_blank" >RIV/49777513:23220/24:43972533 - isvavai.cz</a>

  • Výsledek na webu

    <a href="https://ieeexplore.ieee.org/document/10603698" target="_blank" >https://ieeexplore.ieee.org/document/10603698</a>

  • DOI - Digital Object Identifier

    <a href="http://dx.doi.org/10.1109/ISSE61612.2024.10603698" target="_blank" >10.1109/ISSE61612.2024.10603698</a>

Alternativní jazyky

  • Jazyk výsledku

    angličtina

  • Název v původním jazyce

    Analyzing the Impact of Surface Treatment on Solder Joint Voids

  • Popis výsledku v původním jazyce

    The research presented in this article is a continuation of the previous publication, focusing on the relationships between the mechanical properties, IMC formation, and voids generation in the solder joints. Where the previous study addressed the mere mechanical resistivity of the soldered connections, the current work aims at a comprehensive understanding of the influence of the surface treatments, compositions of the solder alloy, and aging processes. Using a Design of Experiments methodology, 100 samples with varying surface treatments, solder materials, and aging exposure were investigated in terms of the influences of these factors on IMCs and voids formation and subsequent effects on the joints&apos; mechanical strength. The study focus on substantial influence of the surface roughness, regulated by different SiC grit sizes and electroplated nickel, on the IMC layer&apos;s thickness, thereby, on the void formation. Moreover, thermal aging emerged as a crucial factor not only due to the direct enhancement of IMC thickness but also the increasing likelihood of Kirkendall voids occurring, especially at the Cu3Sn layer&apos;s interface. Finally, the results indicated that voids bring negative implications for the mechanical integrity of the joint, especially those of size bigger than 30 μm. By combining the identified factors with the mechanical properties, the study reveals the intricate relationships involved and provides ideas for the enhanced reliability of the joints through optimization of the process parameters. In such a way, the present work emphasizes the necessity of the comprehensive approach to the solder joint enhancement, aiming to optimize the electronic assembling practices for higher durability and performance.

  • Název v anglickém jazyce

    Analyzing the Impact of Surface Treatment on Solder Joint Voids

  • Popis výsledku anglicky

    The research presented in this article is a continuation of the previous publication, focusing on the relationships between the mechanical properties, IMC formation, and voids generation in the solder joints. Where the previous study addressed the mere mechanical resistivity of the soldered connections, the current work aims at a comprehensive understanding of the influence of the surface treatments, compositions of the solder alloy, and aging processes. Using a Design of Experiments methodology, 100 samples with varying surface treatments, solder materials, and aging exposure were investigated in terms of the influences of these factors on IMCs and voids formation and subsequent effects on the joints&apos; mechanical strength. The study focus on substantial influence of the surface roughness, regulated by different SiC grit sizes and electroplated nickel, on the IMC layer&apos;s thickness, thereby, on the void formation. Moreover, thermal aging emerged as a crucial factor not only due to the direct enhancement of IMC thickness but also the increasing likelihood of Kirkendall voids occurring, especially at the Cu3Sn layer&apos;s interface. Finally, the results indicated that voids bring negative implications for the mechanical integrity of the joint, especially those of size bigger than 30 μm. By combining the identified factors with the mechanical properties, the study reveals the intricate relationships involved and provides ideas for the enhanced reliability of the joints through optimization of the process parameters. In such a way, the present work emphasizes the necessity of the comprehensive approach to the solder joint enhancement, aiming to optimize the electronic assembling practices for higher durability and performance.

Klasifikace

  • Druh

    D - Stať ve sborníku

  • CEP obor

  • OECD FORD obor

    20201 - Electrical and electronic engineering

Návaznosti výsledku

  • Projekt

  • Návaznosti

    S - Specificky vyzkum na vysokych skolach

Ostatní

  • Rok uplatnění

    2024

  • Kód důvěrnosti údajů

    S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Údaje specifické pro druh výsledku

  • Název statě ve sborníku

    Proceedings of the International Spring Seminar on Electronics Technology

  • ISBN

    979-8-3503-8547-2

  • ISSN

    2161-2528

  • e-ISSN

    2161-2536

  • Počet stran výsledku

    5

  • Strana od-do

  • Název nakladatele

    IEEE

  • Místo vydání

    Piscaway

  • Místo konání akce

    Prague, Czech Republic

  • Datum konání akce

    15. 5. 2024

  • Typ akce podle státní příslušnosti

    WRD - Celosvětová akce

  • Kód UT WoS článku

    001283808200024