HARPA: Solutions for Dependable Performance under Physically Induced Performance Variability

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F61989100%3A27240%2F15%3A10229627" target="_blank" >RIV/61989100:27240/15:10229627 - isvavai.cz</a>

Nalezeny alternativní kódy

RIV/61989100:27740/15:10229627

Výsledek na webu

<a href="http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=7363685" target="_blank" >http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=7363685</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.1109/SAMOS.2015.7363685" target="_blank" >10.1109/SAMOS.2015.7363685</a>

Jazyk výsledku

angličtina

Název v původním jazyce

HARPA: Solutions for Dependable Performance under Physically Induced Performance Variability

Popis výsledku v původním jazyce

Transistor miniaturization, combined with the dawn of novel switching semiconductor structures, calls for careful examination of the variability and aging of the computer fabric. Time-zero and time-dependent phenomena need to be carefully considered so that the dependability of digital systems can be guaranteed. Already, architectures contain many mechanisms that detect and correct physically induced reliability violations. In many cases, guarantees on functional correctness come at a quantifiable performance cost. The current paper discusses the FP7-612069-HARPA project of the European Commission and its approach towards dependable performance. This project provides solutions for performance variability mitigation, under the run time presence of fabric variability/aging and built-in reliability, availability and serviceability (RAS) techniques. In this paper, we briefly present and discuss modeling and mitigation techniques developed within HARPA, covering many abstractions of digital system design: from the transistor to the application layer.

Název v anglickém jazyce

HARPA: Solutions for Dependable Performance under Physically Induced Performance Variability

Popis výsledku anglicky

Transistor miniaturization, combined with the dawn of novel switching semiconductor structures, calls for careful examination of the variability and aging of the computer fabric. Time-zero and time-dependent phenomena need to be carefully considered so that the dependability of digital systems can be guaranteed. Already, architectures contain many mechanisms that detect and correct physically induced reliability violations. In many cases, guarantees on functional correctness come at a quantifiable performance cost. The current paper discusses the FP7-612069-HARPA project of the European Commission and its approach towards dependable performance. This project provides solutions for performance variability mitigation, under the run time presence of fabric variability/aging and built-in reliability, availability and serviceability (RAS) techniques. In this paper, we briefly present and discuss modeling and mitigation techniques developed within HARPA, covering many abstractions of digital system design: from the transistor to the application layer.

Druh

D - Stať ve sborníku

CEP obor

IN - Informatika

OECD FORD obor

—

Projekt

—

Návaznosti

R - Projekt Ramcoveho programu EK

Rok uplatnění

2015

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název statě ve sborníku

Proceedings - 2015 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, SAMOS 2015

ISBN

978-1-4673-7311-1

ISSN

—

e-ISSN

—

Počet stran výsledku

8

Strana od-do

270-277

Název nakladatele

Institute of Electrical and Electronics Engineers

Místo vydání

New York

Místo konání akce

Samos

Datum konání akce

20. 7. 2015

Typ akce podle státní příslušnosti

WRD - Celosvětová akce

Kód UT WoS článku

000380507900036