Standard Cell Tuning Enables Data-Independent Static Power Consumption

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21240%2F20%3A00341321" target="_blank" >RIV/68407700:21240/20:00341321 - isvavai.cz</a>

Výsledek na webu

<a href="https://doi.org/10.1109/DDECS50862.2020.9095656" target="_blank" >https://doi.org/10.1109/DDECS50862.2020.9095656</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.1109/DDECS50862.2020.9095656" target="_blank" >10.1109/DDECS50862.2020.9095656</a>

Jazyk výsledku

angličtina

Název v původním jazyce

Standard Cell Tuning Enables Data-Independent Static Power Consumption

Popis výsledku v původním jazyce

Physical attacks, namely invasive, observation and combined, represent a great challenge for today’s digital design. Successful class of strategies adopted by industry, allowing hiding data dependency of the side channel emissions in CMOS is based on balancing. Although attacks on CMOS dynamic power represent a class of state-of-the-art attacks, vulnerabilities exploiting data dependency in CMOS static power and light- modulated static power were recently presented. In this paper, we describe structures and techniques developed to enhance and balance traditional static CMOS bulk structures. To enable data dependency hiding, we propose low-level techniques based on complementary-value induced balancing currents, constant current source behavioral approximation, and light-sensing capability of traditional CMOS structures. The proposed techniques may be used to build a dual-rail circuit balanced from both perspectives: static and dynamic power. The publicly available TSMC180nm node standard cell simulation is used for evaluation.

Název v anglickém jazyce

Standard Cell Tuning Enables Data-Independent Static Power Consumption

Popis výsledku anglicky

Physical attacks, namely invasive, observation and combined, represent a great challenge for today’s digital design. Successful class of strategies adopted by industry, allowing hiding data dependency of the side channel emissions in CMOS is based on balancing. Although attacks on CMOS dynamic power represent a class of state-of-the-art attacks, vulnerabilities exploiting data dependency in CMOS static power and light- modulated static power were recently presented. In this paper, we describe structures and techniques developed to enhance and balance traditional static CMOS bulk structures. To enable data dependency hiding, we propose low-level techniques based on complementary-value induced balancing currents, constant current source behavioral approximation, and light-sensing capability of traditional CMOS structures. The proposed techniques may be used to build a dual-rail circuit balanced from both perspectives: static and dynamic power. The publicly available TSMC180nm node standard cell simulation is used for evaluation.

Druh

D - Stať ve sborníku

CEP obor

—

OECD FORD obor

20206 - Computer hardware and architecture

Projekt

<a href="/cs/project/EF16_019%2F0000765" target="_blank" >EF16_019/0000765: Výzkumné centrum informatiky</a><br>

Návaznosti

P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Rok uplatnění

2020

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název statě ve sborníku

Proceedings of the 23rd International Symposium on Design and Diagnostics of Electronic Circuits and Systems

ISBN

978-1-7281-9938-2

ISSN

2334-3133

e-ISSN

—

Počet stran výsledku

6

Strana od-do

—

Název nakladatele

IEEE

Místo vydání

Piscataway, NJ

Místo konání akce

Novi Sad

Datum konání akce

22. 4. 2020

Typ akce podle státní příslušnosti

WRD - Celosvětová akce

Kód UT WoS článku

000587761500013